新手请教

cuilei83

那位高手看一下 生成网络表是有错 不知道怎么改！！！改好了发邮箱吧 谢谢 cuilei83@163.com

deargds

All pins should be numbered.
零件的PIN NUMBER都没定义。

cuilei83

怎么定义啊 能不能帮忙改一下 谢谢  刚学  不太清楚！！

chenlei2004

你的网络表没有问题
8 S( [$ @1 |) P% T********************************************************************************
$ ?8 P, c8 `' _: g*
, P2 x3 `/ e) e8 d/ ~* D& W$ C$ I  d* Netlisting the design
: ^5 \0 f: j9 Q+ O*
********************************************************************************
Design Name:
c:\documents and settings\administrator\桌面\wenjian1\yanli2.dsn
7 ~6 l5 ?- I, s5 y0 wNetlist Directory:
c:\documents and settings\administrator\桌面\wenjian1\allegro
1 N6 a8 n0 ^/ d7 M: AConfiguration File:
0 u. ?! v. ~  c/ P. A8 MD:\Cadence\SPB_15.2\tools\capture\allegro.cfg
, w  G) n/ R& g/ x& J: h
& z' G5 X) n# ]: U! m  KSpawning... "D:\Cadence\SPB_15.2\tools\capture\pstswp.exe" -pst -d "c:\documents and settings\administrator\桌面\wenjian1\yanli2.dsn" -n "c:\documents and settings\administrator\桌面\wenjian1\allegro" -c "D:\Cadence\SPB_15.2\tools\capture\allegro.cfg" -v 3 -j "PCB Footprint"
& J  X1 t# A; S6 L, s) ~#1 Warning [ALG0016] Part Name "CAP_0_CPCYL1/D.300/LS.200/.034_10UF" is renamed to "CAP_0_CPCYL1/D.300/LS.200/.034_".
) L5 j/ s7 w" x% X1 R#2 Warning [ALG0016] Part Name "CAP NP_0_RAD/.200X.100/LS.100/.031_30P" is renamed to "CAP NP_0_RAD/.200X.100/LS.100/.".
#3 Warning [ALG0016] Part Name "CAP NP_1_RAD/.200X.100/LS.100/.031_30P" is renamed to "CAP NP_1_RAD/.200X.100/LS.100/.".
( w* y; g2 t- }/ R4 X4 v% P2 X7 p#4 Warning [ALG0016] Part Name "4 HEADER_0_SIP/TM/L.400/4_4 HEADER" is renamed to "4 HEADER_0_SIP/TM/L.400/4_4 HEA".
0 M5 g" B, T4 Y6 l# r: y- I#5 Warning [ALG0016] Part Name "8 HEADER_0_SIP/TM/L.800/8_8 HEADER" is renamed to "8 HEADER_0_SIP/TM/L.800/8_8 HEA".
. |$ }0 l3 U0 g; Z) [4 |- h#6 Warning [ALG0016] Part Name "SW PUSHBUTTON_0_RAD/.400X.200/LS.300/.034_RESET" is renamed to "SW PUSHBUTTON_0_RAD/.400X.200/L".
2 }; P: ^& |. c! v#7 Warning [ALG0016] Part Name "8051_DIP.100/40/W.600/L2.050_8051" is renamed to "8051_DIP.100/40/W.600/L2.050_80".
$ Y+ `/ X0 I; g#8 Warning [ALG0016] Part Name "74LS373_DIP.100/20/W.300/L1.075_74LS373" is renamed to "74LS373_DIP.100/20/W.300/L1.075".
#9 Warning [ALG0016] Part Name "27512_DIP.100/28/W.600
* n3 c( O/ w$ l' D+ h/L1.400_27512" is renamed to "27512_DIP.100/28/W.600/L1.400_2".
#10 Warning [ALG0016] Part Name "CRYSTAL_0_RAD/.400X.150/LS.300/.034_12M" is renamed to "CRYSTAL_0_RAD/.400X.150/LS.300/".
Scanning netlist files ...
# m. X* s& a$ P/ J7 bLoading... c:\documents and settings\administrator\桌面\wenjian1\allegro/pstchip.dat
Loading... c:\documents and settings\administrator\桌面\wenjian1\allegro/pstchip.dat
% m3 ]* w3 W, V! ~9 \' }Loading... c:\documents and settings\administrator\桌面\wenjian1\allegro/pstxprt.dat
Loading... c:\documents and settings\administrator\桌面\wenjian1\allegro/pstxnet.dat
packaging the design view...
7 C8 _+ n# h1 `2 u* u
& x" @, T/ e& r8 u* X1 J0 j& a, ^4 FExiting... "D:\Cadence\SPB_15.2\tools\capture\pstswp.exe" -pst -d "c:\documents and settings\administrator\桌面\wenjian1\yanli2.dsn" -n "c:\documents and settings\administrator\桌面\wenjian1\allegro" -c "D:\Cadence\SPB_15.2\tools\capture\allegro.cfg" -v 3 -j "PCB Footprint"
* V( t' x  g  z' H; q
就是出现一些警告,你要注意改一下,生不成ALLEGRO文件可能是你的PCB库做的问题