做了一个原理图,有个门电路封装时老是报如下错误信息: - @1 B4 f* ?* W% Y+ r( z1 J1 J# j& T
! x' a6 y0 @& P0 a3 N0 r# }( o% S
The mapping of gates in the Component section - J+ z" U/ B8 `. d. T8 ~resulted in a gate composed completely of common pins. ) {6 J' v1 |- P9 kThat is, all of its pin numbers were found more than once ; }/ T6 }, H) k+ b: ?in the Component section. Such a gate is supeRFluous and : s9 a4 X: h: u! x6 j6 \illegal and must be removed by correcting the Parts DataBase8 G, b2 Q9 p/ R# d1 P3 N
+ a) L% D2 V+ b% }3 f/ D " _9 b9 F" ^1 [3 Z/ J+ f0 R5 L8 F; ` x! R2 G0 j9 Z
求教如何解决?