Allegro 中报错Dml model tdr_out is duplicated 2 times in libraries！详情如下！

qianling

allegro 中报如下错怎么解决？
; ~; o: m* {; c$ H' z5 P/ K# T, YWARNINGS:
" I, d/ W/ ^" _% l% u* _4 bDml model tdr_out is duplicated 2 times in libraries
         D:\cadence\SPB_16.6\share\local\pcb\signal\cds_samples.dml D:\Cadence\SPB_16.6\share\pcb\signal\cds_samples.dml.
Dml model se_test_fixture is duplicated 2 times in libraries
8 g% t$ R& q- p8 U% U         D:\Cadence\SPB_16.6\share\local\pcb\signal\cds_samples.dml D:\Cadence\SPB_16.6\share\pcb\signal\cds_samples.dml.
1 _* M& U: q" {6 q; w6 m. o& _  w, lDml model scope_in is duplicated 2 times in libraries
4 q5 o$ a2 T4 }( d8 @         D:\Cadence\SPB_16.6\share\local\pcb\signal\cds_samples.dml D:\Cadence\SPB_16.6\share\pcb\signal\cds_samples.dml.
( J. I$ E. E8 p9 X, mDml model resistorPack_850 is duplicated 2 times in libraries
         D:\Cadence\SPB_16.6\share\local\pcb\signal\cds_samples.dml D:\Cadence\SPB_16.6\share\pcb\signal\cds_samples.dml.
6 e2 P' m' o( U8 W3 |+ t% zDml model resistor50 is duplicated 2 times in libraries
         D:\Cadence\SPB_16.6\share\local\pcb\signal\cds_samples.dml D:\Cadence\SPB_16.6\share\pcb\signal\cds_samples.dml.
Dml model p14u1_sparam_pkg is duplicated 2 times in libraries
         D:\Cadence\SPB_16.6\share\local\pcb\signal\cds_samples.dml D:\Cadence\SPB_16.6\share\pcb\signal\cds_samples.dml.
Dml model p14u1_modsel is duplicated 2 times in libraries
2 c( S  N3 o; u5 N# z         D:\Cadence\SPB_16.6\share\local\pcb\signal\cds_samples.dml D:\Cadence\SPB_16.6\share\pcb\signal\cds_samples.dml.
Dml model p14u1_diffPair is duplicated 2 times in libraries
         D:\Cadence\SPB_16.6\share\local\pcb\signal\cds_samples.dml D:\Cadence\SPB_16.6\share\pcb\signal\cds_samples.dml.
) h; U" T) g* f+ O/ LDml model p14u1 is duplicated 2 times in libraries
2 c# i- b' _* @3 l8 \' j         D:\Cadence\SPB_16.6\share\local\pcb\signal\cds_samples.dml D:\Cadence\SPB_16.6\share\pcb\signal\cds_samples.dml.
  @" R% b# s4 g# \# `5 u2 U# ZDml model lvdsload is duplicated 2 times in libraries
         D:\Cadence\SPB_16.6\share\local\pcb\signal\cds_samples.dml D:\Cadence\SPB_16.6\share\pcb\signal\cds_samples.dml.
& z  w. [2 W) B* E5 oDml model inductor15nH is duplicated 2 times in libraries
. n$ P3 h6 }! o3 w0 T4 ~1 p7 U         D:\Cadence\SPB_16.6\share\local\pcb\signal\cds_samples.dml D:\Cadence\SPB_16.6\share\pcb\signal\cds_samples.dml.
8 |/ Q4 {9 p, D# g5 rDml model capacitor20pF is duplicated 2 times in libraries
* X0 P' R3 |" X6 v3 v/ E* v8 J         D:\Cadence\SPB_16.6\share\local\pcb\signal\cds_samples.dml D:\Cadence\SPB_16.6\share\pcb\signal\cds_samples.dml.
& F+ W, T- O; TDml model cable_espice is duplicated 2 times in libraries
! k( ]) }; X7 j& w  V         D:\Cadence\SPB_16.6\share\local\pcb\signal\cds_samples.dml D:\Cadence\SPB_16.6\share\pcb\signal\cds_samples.dml.
5 v3 U5 r; J; J/ {1 u4 R4 `) mDml model blm2_pos is duplicated 2 times in libraries
! n/ Y: ]2 m4 o# Q3 E4 ~# K* z- Q         D:\Cadence\SPB_16.6\share\local\pcb\signal\cds_samples.dml D:\Cadence\SPB_16.6\share\pcb\signal\cds_samples.dml.
7 i* K* J) s4 z4 p- m4 NDml model TestPt_ESpice is duplicated 2 times in libraries
7 ]. T& l4 k; B" P) H7 }$ b         D:\Cadence\SPB_16.6\share\local\pcb\signal\cds_samples.dml D:\Cadence\SPB_16.6\share\pcb\signal\cds_samples.dml.
- T/ S9 K8 W) x  K( i) s6 y0 vDml model ScopeProbe2 is duplicated 2 times in libraries
" W9 y$ h; R: P9 U" F         D:\Cadence\SPB_16.6\share\local\pcb\signal\cds_samples.dml D:\Cadence\SPB_16.6\share\pcb\signal\cds_samples.dml.
* B: X7 y" }7 G2 M7 {0 P& wDml model ScopeProbe1 is duplicated 2 times in libraries
- v/ j" i- F( i, L2 m+ n4 f         D:\Cadence\SPB_16.6\share\local\pcb\signal\cds_samples.dml D:\Cadence\SPB_16.6\share\pcb\signal\cds_samples.dml.
3 D' e8 {- Z' o  V, tDml model R50_withpkg is duplicated 2 times in libraries
6 z6 X. @; z$ W, I" H         D:\Cadence\SPB_16.6\share\local\pcb\signal\cds_samples.dml D:\Cadence\SPB_16.6\share\pcb\signal\cds_samples.dml.
! Q% F0 `  K- j* i9 W/ TDml model PCIxload is duplicated 2 times in libraries
         D:\Cadence\SPB_16.6\share\local\pcb\signal\cds_PCIx_samples.dml D:\Cadence\SPB_16.6\share\pcb\signal\cds_PCIx_samples.dml.
. M$ k) w2 w1 m3 @Dml model FourWireCable is duplicated 2 times in libraries
         D:\Cadence\SPB_16.6\share\local\pcb\signal\cds_samples.dml D:\Cadence\SPB_16.6\share\pcb\signal\cds_samples.dml.
. n7 m# e4 Y& C0 t7 }Dml model EightPin_3p3v is duplicated 2 times in libraries
. s, X/ F* c& O2 C         D:\Cadence\SPB_16.6\share\local\pcb\signal\cds_samples.dml D:\Cadence\SPB_16.6\share\pcb\signal\cds_samples.dml.
Dml model EightPin_2p5v is duplicated 2 times in libraries
' w" m  R" f5 E2 W; A& h  {         D:\Cadence\SPB_16.6\share\local\pcb\signal\cds_samples.dml D:\Cadence\SPB_16.6\share\pcb\signal\cds_samples.dml.
Dml model EightPin_1p8v is duplicated 2 times in libraries
         D:\Cadence\SPB_16.6\share\local\pcb\signal\cds_samples.dml D:\Cadence\SPB_16.6\share\pcb\signal\cds_samples.dml.
Dml model DummyProbe is duplicated 2 times in libraries
3 m8 B) M' X* ~# N6 a         D:\Cadence\SPB_16.6\share\local\pcb\signal\cds_iocells.dml D:\Cadence\SPB_16.6\share\pcb\signal\cds_iocells.dml.
Dml model CDS_lvds_out is duplicated 2 times in libraries
         D:\Cadence\SPB_16.6\share\local\pcb\signal\cds_iocells.dml D:\Cadence\SPB_16.6\share\pcb\signal\cds_iocells.dml.
; Q, C6 F% h) u& V" ~Dml model CDS_lvds_in is duplicated 2 times in libraries
' e, O2 [. H9 Z5 Y. [         D:\Cadence\SPB_16.6\share\local\pcb\signal\cds_iocells.dml D:\Cadence\SPB_16.6\share\pcb\signal\cds_iocells.dml.
Dml model CDS_lvds_device is duplicated 2 times in libraries
         D:\Cadence\SPB_16.6\share\local\pcb\signal\cds_samples.dml D:\Cadence\SPB_16.6\share\pcb\signal\cds_samples.dml.
Dml model CDS_Pkg16DIP is duplicated 2 times in libraries
, s, E$ y* A6 T: ^- |2 G         D:\Cadence\SPB_16.6\share\local\pcb\signal\cds_packages.dml D:\Cadence\SPB_16.6\share\pcb\signal\cds_packages.dml.
Dml model CDS_Pkg14DIP_Sparse is duplicated 2 times in libraries
+ [) T/ k& i: c' q) a* m2 J8 H         D:\Cadence\SPB_16.6\share\local\pcb\signal\cds_packages.dml D:\Cadence\SPB_16.6\share\pcb\signal\cds_packages.dml.
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