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Traslation stopped due to errors listed in the log files
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9 C+ Q* G/ _1 ~' Flog files:0 Z- j( ?4 g) t' J6 O& B
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t$ n, W4 O6 ?9 V+ fTranslating E:\Temporary_lib\default.asc.
- j+ H, U& q" [9 d) R( b/ ^6 }Using translator version @(#)$CDS: pads_in.exe v16-3-85CK 9/12/2011 Copyr 2011 cadence DESIGN SYSTEMS.$ A5 ]$ C7 Y7 T; z
Reading PADS ASCII file header./ Y% {6 @, U4 y$ f" ]* N
Version = PowerPCB2007.0
' t+ ?9 h2 m z0 R* u( o Route Layers = 2
- x7 V% o! |( G Units = MILS6 T' z2 r N# r0 z6 H
Hatch mode = Vertical / Horizontal
O5 F% N+ G% x8 I5 {0 c( Y. k Hatch grid = 10.000000, angle = 0.000000, anti-pad spacing = 0.000315
# d4 b/ g/ f- [# l. B7 j: }/ `3 M8 y( GInitializing new database.
- G0 g5 n% C- B3 g' g5 U) r Creating layers.
0 y* O$ \2 X. k) nReading PADS ASCII file body. I, W0 O9 I& _1 }/ t% X* |
*MISC*0 F9 ^8 _% w/ ~
*MISC*
" [( N9 u' G+ M3 l7 `0 zInformation: CSet 1_2_3 renamed to DEFAULT
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Warning: allegro doesn't support default electrical CSets.6 H+ T$ S) |% X g/ ]! h$ ?" M
Please assign electrical cset DEFAULT to the objects manually.
3 C2 q7 G' D# g) A: r- K" X *MISC*
8 s. U, w; ?2 C& l' P *MISC*- {& @0 I D7 k B; }
*MISC*
) j3 {; H* f0 w4 M1 t( GERROR: Parse error on line 3962.; j* j1 b$ C, y, m: H
: j9 R% u4 A0 `* T. t& KERROR: Finished with errors., p' f0 i: K' l/ m- ]( H
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发表于 2014-4-10 10:11
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