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Traslation stopped due to errors listed in the log files
5 J/ v4 s P! I; c5 c( n( J) q- C" }/ f& o6 o4 h
& v6 O2 F6 a2 W5 M: i; W' {6 alog files:
+ X5 y3 S4 u; b2 x% w
5 n, I/ w+ R- |3 q Y- T
4 O+ r, C7 R4 U( m8 cTranslating E:\Temporary_lib\default.asc.
7 F0 M- K$ ?7 Q+ LUsing translator version @(#)$CDS: pads_in.exe v16-3-85CK 9/12/2011 Copyr 2011 cadence DESIGN SYSTEMS.# d: N Z3 \+ M6 T+ R1 |6 J& p
Reading PADS ASCII file header.8 l: ~5 t0 [$ y1 r! X( v/ k
Version = PowerPCB2007.05 w0 r* L5 q( m7 v6 J
Route Layers = 2
* v: h( F- p7 U1 `; e d C" c Units = MILS
. d3 ]/ l; V" @& m3 M Hatch mode = Vertical / Horizontal4 p. W7 h Y, E7 U' L: M
Hatch grid = 10.000000, angle = 0.000000, anti-pad spacing = 0.0003159 O% Y0 K6 j/ |$ h- ]6 t
Initializing new database.4 T3 h/ z/ `0 s/ w
Creating layers.
+ R& c( a+ n/ X }; c W- `2 oReading PADS ASCII file body.( a, x3 A0 C* U. I
*MISC*2 D# r( E9 n- l: y1 Q4 |
*MISC*
! W! F5 W0 T; _$ j$ o( zInformation: CSet 1_2_3 renamed to DEFAULT
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% @3 G5 [' x7 q, X% k) }# `* z! eWarning: allegro doesn't support default electrical CSets." w: E- K ^" t8 Q# \1 b7 X/ w1 S6 B
Please assign electrical cset DEFAULT to the objects manually.8 U P& V- y- V5 N6 {+ Q! R
*MISC*
' Y$ L9 I) a( N {+ L *MISC*
7 x' i1 _4 l* f( I& ]5 D *MISC*
' ?, d/ u# w; m4 w( t! e% w' j9 _ERROR: Parse error on line 3962.
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9 t7 V9 g( ~; }3 C- J+ gERROR: Finished with errors.5 K! U! P( V+ r) g
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发表于 2014-4-10 10:11
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