板子不启动，无打印信息

szkalwa

楼主请参考下我以前做海思DVR产品时，UBOOT或UART起不来的原因：
1、DDR芯片是否在软件支持范围内？型号太多，有的软件可能还要调整对DDR的支持;或DDR芯片没有焊好；
# ?& _# `& a+ k2、NAND FLASH品牌有的支持有的不支持，搞得无法启动！
ARM的BGA芯片连接NAND这一块，BGA 引脚有虚焊导致；
$ _8 k6 C2 y9 B& e2 m/ |3 \; R3、复位芯片有问题
2 N) z# \, b, H6 S+ C+ @1 j3 P. C4、再有就是网络芯片后缀型号不一样，也会导致无法启动（这一点有些纳闷，一直想不明白，这刚启动怎么会和网络挂上关系？）
+ H4 _% {. W+ k1 C, [1 c5、电源；（这个相对好解决，量一量就知道）
- Y/ [, M$ t: n6、最后就是PCB设计问题了，但如果DDR3不那么完整性，也不至于会不启动，顶多是能启动了，但一会就会死机的

klend

會不會是DDR的時鐘匹配電阻有問題？是差分100歐阻抗控制的。這裏兩個電阻是100歐。

klend

换了nandflash后和加焊DDR后有两种状态，但是板子都没有启动成功，串口有打印。
以下是状态1的log:
% V: F3 X  H5 C3 F! j3 R+ CSoC preloader 1.0.0.r1422.lzma (Wed Nov 13 14:32:57 CST 2013)
$ ^7 I7 a: m/ I" A) RII: Stack @ 0x9fc1fd18 (parameter 736B)
" ^# k, u7 u: ?8 W! b& D  VII: Console... OK
6 u; t( n) f9 K! V0 t# S0 lSetting DTR
) B' t9 e/ l8 wII: DRAM is set by software calibration... PASSED

DDRKODL(0xb800021c):0x00000410
MCR (0xb8001000):0x22041de0, 0x21220000, 0x54433830, 0x0404030f
" I% x8 |8 y! |. eDTR2(0xb8001010):0x0630d000
PHY Registers(0xb8001500):
0xb8001500:0x80000010, 0x0000007f, 0xa1a00000, 0xfdffffff
7 a6 N. t6 R5 E  Z* @0 Q. s0xb8001510:0x00140a00, 0x00180c00, 0x00140a00, 0x00180c00
6 v, `/ @. {2 a; i* x0xb8001520:0x001a0d00, 0x00140a00, 0x00160b00, 0x00120900
0xb8001530:0x001c0e00, 0x001e0f00, 0x001c0e00, 0x001e0f00
0xb8001540:0x001e0f00, 0x001a0d00, 0x001c0e00, 0x001a0d00
! T6 @: f7 A% B; C4 s8 y0xb8001550:0x00100800, 0x00140a00, 0x00100800, 0x00140a00
0xb8001560:0x00160b00, 0x00120900, 0x00140a00, 0x00100800
0xb8001570:0x001a0d00, 0x001a0d00, 0x00180c00, 0x001c0e00
# ~' T+ }8 v1 a8 s6 t! o0xb8001580:0x001c0e00, 0x00180c00, 0x001a0d00, 0x00180c00
0xb8001590:0x00000000, 0x5110dbd9, 0xa9a95656, 0x5352b5b5
0xb80015a0:0x4145dcdc, 0x00000000, 0x00000000, 0x00000000
2 r5 h" R0 u2 D9 R, |. LII: PLL is set by SW... OK
; q( e% Q  \1 ]3 s. v, WII: Flash... OK
& N& ^8 Y0 l" s+ s6 SII: Stack @ 0x801ffff8
II: Starting U-Boot...
. ]* Z# d& E# U# t" L7 YII: Inflating U-Boot (0x80000040 -> 0x87c00000)...
& G0 @4 K. v: ]/ n+ n7 s& v  PEE: decompress failed: 1
以下是状态2板了log:
5 j. u! }1 b1 G# a( @SoC preloader 1.0.0.r1422.lzma (Wed Nov 13 14:32:57 CST 2013)
II: Stack @ 0x9fc1fd18 (parameter 736B)
II: Console... OK
Setting DTR
6 `6 l" W1 T2 c: TII: DRAM is set by software calibration... PASSED
& d6 k1 R. G! D" m: b) E5 U
DDRKODL(0xb800021c):0x00000410
+ E7 r) T7 m9 h' E/ RMCR (0xb8001000):0x22041de0, 0x21220000, 0x54433830, 0x0404030f
DTR2(0xb8001010):0x0630d000
) G5 x& P/ x& X3 }! y4 n; s/ D& EPHY Registers(0xb8001500):
: X. L' L" J3 }" Y& }2 U6 Y0xb8001500:0x80000010, 0x0000007f, 0xa1a00000, 0xffffffff
& }# N0 J! _1 H7 E$ H8 q0xb8001510:0x00120900, 0x00140a00, 0x00120900, 0x00160b00
' R! S  q. X; S  B9 Z0 x% T+ ?/ p0xb8001520:0x00140a00, 0x00120900, 0x00140a00, 0x00100800
0xb8001530:0x00180c00, 0x001a0d00, 0x00180c00, 0x001a0d00
0xb8001540:0x001a0d00, 0x00180c00, 0x001a0d00, 0x00180c00
0xb8001550:0x00120900, 0x00160b00, 0x00120900, 0x00140a00
. t2 e( O) e/ a  `% K# d4 r; X0xb8001560:0x00140a00, 0x00140a00, 0x00120900, 0x00100800
0 [/ z" c9 w$ W: B$ w+ S3 [7 g( a0xb8001570:0x001c0e00, 0x001c0e00, 0x00180c00, 0x001c0e00
' r) O! u7 g3 i* q1 D) f0xb8001580:0x001a0d00, 0x00180c00, 0x001a0d00, 0x00180c00
0xb8001590:0x00000000, 0x5adad2d2, 0x24207574, 0x5a5adada
$ z# z6 O( V: R7 N0xb80015a0:0x8d0da7a5, 0x00000000, 0x00000000, 0x00000000
II: PLL is set by SW... OK
II: Flash... OK
II: Stack @ 0x801ffff8
II: Starting U-Boot...
$ V# I( ?/ f  U2 h  M5 SII: Inflating U-Boot (0x80000040 -> 0x87c00000)... OK
$ A0 i2 I# E' H6 n- iII: Starting U-Boot...
3 `; _! a( ?, G+ d+ t
, b- a' F4 A9 ]8 g& X4 o
U-Boot 2011.12.NA (Nov 13 2013 - 14:33:03)
1 D, N' ^  c6 x* F2 n  H; ]
Board: LUNA
CPU: RLX5281 600.00 MHz, DSP: RLX5181 500.00 MHz, , DDR3 300MHz, LX:200.00 MHz
0 O0 l2 ]5 O" a+ [' u# X$ a9 fDRAM:  128 MB
enter nand_init
2 ~) C3 K* j* s' Y+ E$ Nboard_nand_init()
parameters at 0x00001212
4 D( ^) a4 P" K, I- Z% t  B; a! J# Y# Lparameters.read at 0x9fc00550
- k8 {1 n8 E- }% |parameters.write at 0x9fc03308
  L8 D  X: Q  ]5 n! T9 q9 k7 l# B  Jparameters.bbt at 0x9fc1feac
uboot- read nand flash info from SRAM
- b; t  t7 a5 Rflash_info list
flash_info.num_block : 1024
flash_info.num_page_per_block : 64
( p5 G" J+ m  H. d7 e- C- ^( Xflash_info.page_per_chunk : 1
flash_info.bbi_dma_offset : 2000
+ J2 ~; ~* J- O- qflash_info.bbi_raw_offset : 2048
, N3 R2 ?2 T9 `% [! r# @# E5 Xflash_info.bbi_swap_offset : 23
flash_info.page_size : 2048
2 U/ K. U3 Q$ [. Gchunk size : 2048
flash_info.addr_cycles : 4
pblr_start_block : 1
9 b, O  T$ k) fnum_pblr_block : 3
parameters.curr_ver is a
parameters.plr_num_chunk is 29
- i* f" s% L5 e6 m" ~( X4 o* @" F2 Pparameters.blr_num_chunk is 45
parameters.end_pblr_block is 4
- t1 U2 V" ]0 s* }rtk_nand_read_id id_chain is 9580f192
( H/ a! E2 {+ I& snand: Manufacture ID=0x92, Chip ID=0xf1, 3thID=0x80, 4thID=0x95, 5thID=0x40, 6thID=0xc0
# [* b4 a7 |/ i/ @# zthis->pagemask is 65535
this->chip_shift is 27
5 v6 a* ?2 u3 K( ?/ Y+ wparameters.bbt_valid is 1
create_logical_skip_bbt
last skip_block 1024
4 t+ _0 U$ i! e; W( h1 h% Gnand.c nand_init_chip mtd size is 877bfeac
4 s4 _8 t2 c1 y* L( {128 MiB
Loading 131072B env. variables from offset 0xc0000
( p' i4 q) {1 ^, P# v: pUnknown command 'sf' - try 'help'
- a6 V4 l% j) G* t4 F- y, mNet:   LUNA GMAC
Warning: eth device name has a space!
- C9 b- ]% D7 }0 F$ ~* W+ f
Hit space key to stop autoboot:  0
! Z; w$ Z6 d  x& r

ACTIVE IMAGE 0 (tryactive=2 sw_commit=0)
4 p9 x/ F' f+ a: F4 V
reset pcie0
" M9 j( x. V: _reset pcie1

/ p/ W2 W  N( dNAND read: device 0 offset 0x100000, size 0x380000
3670016 bytes read: OK
## Booting kernel from Legacy Image at 82000000 ...
   Image Name:   Linux-2.6.30
8 f8 T* o1 F5 L6 E& S$ K+ D   Created:      2013-11-14   2:56:37 UTC
+ D3 c. O( b* K  T- c   Image Type:   MIPS Linux Kernel Image (lzma compressed)
  U" Q4 ?, j! N: X$ W# w5 k% I. ]   Data Size:    1791872 Bytes = 1.7 MB
! G: i, Z) v' H5 B! E   Load Address: 80000000
  w$ w: P. i! ^' r8 q   Entry Point:  80000000
* I" `/ I9 s* I* G   Verifying Checksum ... Bad Data CRC
; e& N! L4 q8 e0 R- w9 \ERROR: can't get kernel image!
+ Y2 A( b- w2 V# j* Y5VT-2510#
! e1 j. ?. ?' {! u请问大家这是什么问题呢？

klend

szkalwa 发表于 2013-12-2 17:04
. b+ T9 M& K7 g& |楼主请参考下我以前做海思DVR产品时，UBOOT或UART起不来的原因：
* N' U! H% }, Q& \1、DDR芯片是否在软件支持范围内？型号太 ...

$ k. f* z, b* @: H. S) W9 i; x我发串口打印信息了，请大家帮忙看看。

klend

bluskly 发表于 2013-11-29 10:23
串口没打印信息？ 串口电平对不？ TXD和RXD没有接反？ 地线有没有接？ 驱动有吧？
唉。。
5 g0 Q* Y  t( `, @# x- X7 ]不知道。。。

怎么还木有人回复

jesseliu

DDR 没有贴好吧！

jesseliu

看看是不是那一组重要的电压点纹波比较大？？

xhk_hlju

! r. P, c% W2 \; o- L
+ g: a. x& p8 j+ \! V" {* v确定电源电压纹波是否正常
/ I- c0 O0 [, BCPU DDR焊接能保证么
5 s' y* P4 m% D8 i这是前提
" O7 [: V; V- U. b* U1 y还有就是DDR跑300MHz有没设置啊  DLL用打开么
有没Kernel么 那不是？？

klend

xhk_hlju 发表于 2013-12-5 15:43
确定电源电压纹波是否正常
( L8 _5 z9 i) L: ]9 e+ h4 W3 zCPU DDR焊接能保证么
/ y" v: z$ B9 E5 \, E6 w这是前提

SoC preloader 1.0.0.r1480.lzma (Tue Dec  3 09:50:34 CST 2013)
% `) @" E' ]- mII: Stack @ 0x9fc1fd18 (parameter 736B)
II: Console... OK
Setting DTR
II: DRAM is set by software calibration...
II: small max_w_len=7, bit_loc=12
1 G; o/ x& o* |5 ?6 M9 K) _) fPASSED

% `$ D/ M: ?- ^: }& f6 W  gDDRKODL(0xb800021c):0x00000410
- Y3 x0 H' r" B- gMCR (0xb8001000):0x22041de0, 0x21220000, 0x54433830, 0x0404030f
DTR2(0xb8001010):0x0630d000
; S- J' |, n) t$ `% b; H! EPHY Registers(0xb8001500):
0xb8001500:0x80000030, 0x0000007f, 0xa1a00000, 0xffffffff
) U0 \' K9 s9 Q8 E% T* ~0xb8001510:0x00140a00, 0x00160b00, 0x00140a00, 0x00180c00
0xb8001520:0x001a0d00, 0x00160b00, 0x00160b00, 0x00140a00
/ V* w0 u' H- D4 d2 A" s0xb8001530:0x001a0d00, 0x001c0e00, 0x001a0d00, 0x001c0e00
( C3 I8 S" [1 V0xb8001540:0x001e0f00, 0x001c0e00, 0x001e0f00, 0x001c0e00
% {9 Z7 x9 W, x" ^3 X0xb8001550:0x00120900, 0x00140a00, 0x00120900, 0x00160b00
2 q5 M5 K' A' l& \# ^/ J  U0xb8001560:0x00180c00, 0x00140a00, 0x00140a00, 0x00100800
( ?2 Q) O4 M6 Z  ?, C* T: V/ E0xb8001570:0x001a0d00, 0x001c0e00, 0x001a0d00, 0x001c0e00
0xb8001580:0x001c0e00, 0x001a0d00, 0x001c0e00, 0x00180c00
0xb8001590:0x00000000, 0x5ada9a92, 0x2929a5a5, 0x5a5adada
0xb80015a0:0x4f4f87c3, 0x00000000, 0x00000000, 0x00000000
II: PLL is set by SW... OK
3 `2 {+ L& A! z% EII: Flash... OK
; t: n0 Q. y5 LII: Stack @ 0x801ffff8
II: Starting U-Boot...
II: Inflating U-Boot (0x80000040 -> 0x87c00000)... OK
! P9 Y2 M9 r, C8 `% sII: Starting U-Boot...
+ Y2 a" U/ W6 L+ Y. Q9 `" C
  k+ q# |+ e) k
; Z9 ^* o- @9 r0 `" |U-Boot 2011.12.NA (Dec 03 2013 - 09:50:44)
. G9 D* p) j: @8 s' [
+ v& K5 b9 J( k) j: YBoard: LUNA
5 X* B5 \' R" V7 v- L: Q" l/ jCPU: RLX5281 600.00 MHz, DSP: RLX5181 500.00 MHz, , DDR3 300MHz, LX:200.00 MHz
4 M. Q( X: I2 P. y% D2 f8 N+ D1 W5 CDRAM:  128 MB
enter nand_init
2 G0 Q) i  Y& @) K& T; cboard_nand_init()
7 b0 m1 O$ y2 S" x$ g% [parameters at 0x00001212
. w! u- d( S' V* Sparameters.read at 0x9fc00550
# l0 [* i) y# [9 yparameters.write at 0x9fc03298
parameters.bbt at 0x9fc1feac
1 |; M; t1 h$ x- [$ Cuboot- read nand flash info from SRAM
6 q3 f) k+ \& cflash_info list
flash_info.num_block : 1024
flash_info.num_page_per_block : 64
flash_info.page_per_chunk : 1
5 r0 C6 F9 O) aflash_info.bbi_dma_offset : 2000
flash_info.bbi_raw_offset : 2048
* d: E  ~' y4 x% D1 g. k, sflash_info.bbi_swap_offset : 23
4 j  a" N; w' ^8 w( dflash_info.page_size : 2048
chunk size : 2048
- K( l, q2 m0 E/ T: |5 P7 {0 dflash_info.addr_cycles : 4
  ~/ E7 V! f' bpblr_start_block : 1
num_pblr_block : 3
2 ?3 b. a! ^7 [3 T+ ]parameters.curr_ver is a
parameters.plr_num_chunk is 29
- h: o: h5 Z( j+ l) z0 N) Wparameters.blr_num_chunk is 45
parameters.end_pblr_block is 4
; r$ P7 H) ]6 ?8 Trtk_nand_read_id id_chain is 9580f192
! s- q' x- y+ h3 dnand: Manufacture ID=0x92, Chip ID=0xf1, 3thID=0x80, 4thID=0x95, 5thID=0x40, 6thID=0xc0
this->pagemask is 65535
this->chip_shift is 27
3 |/ e' a+ Z5 S1 I; wparameters.bbt_valid is 1
2 `( O; m. Y+ Lcreate_logical_skip_bbt
* c+ o# J' ^* f: llast skip_block 1024
# k: v9 {8 j) ynand.c nand_init_chip mtd size is 877bfeac
7 L8 i7 t9 Q: B128 MiB
' ?) {9 c" {' v3 I' tLoading 131072B env. variables from offset 0xc0000
Net:   5VT_GMAC
2 \: h( y3 f" Y- WHit space key to stop autoboot:  0
6 J. a8 g1 ?) q

( S$ K/ c( A) Y1 v9 _) H& B4 oACTIVE IMAGE 0 (tryactive=2 sw_commit=0)
1 m, B# N" [% }! F1 N* y
* u3 _2 _  `1 v+ M/ ^; ireset pcie0
' j, i9 c: I. A/ c$ X) O, Creset pcie1

5 l4 ^: T7 S, r: n& w" A% aNAND read: device 0 offset 0x100000, size 0x380000
3670016 bytes read: OK
; d# H9 G# ^6 z+ O## Booting kernel from Legacy Image at 82000000 ...
   Image Name:   Linux-2.6.30
+ c! M- T/ j! h* i: q. I! G   Created:      2013-12-04  11:05:44 UTC
   Image Type:   MIPS Linux Kernel Image (lzma compressed)
6 R( @1 D' g+ D! l6 t   Data Size:    1788887 Bytes = 1.7 MB
   Load Address: 80000000
   Entry Point:  80000000
   Verifying Checksum ... OK
" ~0 v  L* [$ |4 z! Z' d# K9 g   Uncompressing Kernel Image ...
) E) E) |* g, H8 K) Z* D+ q是不是内核不启动？软件还是硬件问题？

szkalwa

ERROR: can't get kernel image!
- V5 {! ~) |! l8 v5 k内核没起来。
可能还是和DDR这边有关系

klend

szkalwa 发表于 2013-12-5 17:33
) o) p9 G8 F3 `9 D! Q$ \6 ?" a( T  gERROR: can't get kernel image!
& k* K: |. M# l内核没起来。
可能还是和DDR这边有关系

& d+ \" a" U% S  b2 J是pcb布线影响到DDR的频录跑不高还是DDR的时序有问题？怎么确认呢？怎么解决？

抓个妞去溜溜

根据经验，如果一切电气特性正常没有打印，那么接下来就是CUP和Flash的问题了（当然要先确定软件是否烧对）。如果有打印信息后就要看DDR有没有跑起来，DDR有没有跑起来可以看打印信息，这方面可以询问厂商DDR没有起来的经典打印信息，如果涉及到kernel的问题，这就需要软件配合了，现在即使同一型号的CPU可能因为版本不同就会导致kernel问题。

wesnly

是不是芯片肚子上的接地焊盘没焊？

646571959

检查检查各路电压吧

klend

wesnly 发表于 2013-12-6 14:28
是不是芯片肚子上的接地焊盘没焊？

是没焊，IC温度很高，焊了以后温度稍低一点，但是还是不能启动成功。