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我的还是不行呢,好多的帖子都试过了,一直出现
9 d) A5 ~3 S8 s7 ~- aTranslating E:/SPB16.3/Allegro/temp/project/S713OBX_SUBFPC/11.asc.
5 Y5 ~8 J! u4 l; Q5 C7 hUsing translator version @(#)$CDS: pads_in.exe v16-3-85D 11/3/2009 Copyr 2009 CADENCE DESIGN SYSTEMS.
3 W: o, u+ X& a/ ^; G% W, aReading PADS ASCII file header.* \- h7 Y4 ?6 e. G+ [; q
Version = PowerPCB4.07 _+ }6 x. M0 a8 }! I- f3 j5 g
Route Layers = 2
: \! j4 }8 ~1 A Z Units = METRIC
4 {0 H& M0 d/ V! i9 w5 F+ k4 Q Hatch mode = Vertical / Horizontal/ q* H j+ n }) O2 I
Hatch grid = 0.100000, angle = 0.000000, anti-pad spacing = 0.000008
: S; T# I$ l9 R S! J9 s! bInitializing new database.
2 d, x a c; O8 y Creating layers./ C$ M5 f) ~; ]% _! Y
Reading PADS ASCII file body.- j9 A( Y+ k' l( r! }3 D7 n
*MISC*
* A& ] z5 v U0 u) c( n* L9 @ *MISC*
4 t7 Q f' g- NInformation: CSet 1_5_6 renamed to DEFAULT3 e3 `' `, N. Q( {# Q9 ~
: |* Q J0 L: N% R
Warning: Allegro doesn't support default electrical CSets.- [. V6 P* ~3 b" A. D3 I- n0 h6 N
*MISC*
$ ]3 q' N" O$ d *MISC*
, c# S* _6 `/ X, }' r7 w *MISC*& F( S9 ?; c& ~& B
LZ帮忙看一下什么问题呢? |
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