|
|
EDA365欢迎您登录！
您需要 登录 才可以下载或查看，没有帐号？注册
x
更新内容及模块：; w1 b/ F3 o* e. r* s+ E; c
DATE: 06-14-2013 HOTFIX VERSION: 0118 w8 K3 g+ {. s% {3 T$ c1 k
===================================================================================================================================* O9 Y* i2 L: E5 i0 U8 p
CCRID PRODUCT PRODUCTLEVEL2 TITLE
: v( b7 x& i0 g* a* @3 O===================================================================================================================================
' p1 \6 D' c+ n6 Z; B' |982306 concept_HDL OTHER When plotting a PDF publisher output the page coming out half inch bigger in pdf
% ~3 t/ F# v( r5 U# h1055338 SIP_LAYOUT DRC_CONSTRAINTS Soldermask to Via drcs on bondfingers
5 Z! u5 D- R. _% |1093375 allegro_EDITOR PLACEMENT Align Module with Zero spacing value space the modules further away the modules should be nearer
! v/ [ E( H! I; s X7 m" R) D1103201 RF_PCB FE_IFF_IMPORT Wrong permissions to map file during IFF import
# r3 _ N: q, G% b. y; r! Z4 |9 u1106900 CONCEPT_HDL COMP_BROWSER Component Browser performance utility should honor CPM directives for include and exclude PPT7 N/ ^- ~0 T8 t4 I! D3 a
1110178 ALLEGRO_EDITOR EDIT_ETCH Line Width Retention should be controlled via setting
& P8 w7 s3 c6 S1110323 APD DXF_IF DXF out is offsetting square discrete pads.+ A1 J1 T' c: B# j& o F% ]
1123581 ALLEGRO_EDITOR MANUFACT Dimension Line gets changed on board
+ [, C8 ~+ W! _1134083 CONCEPT_HDL OTHER Published PDF file's hyperlinks do not work fine when user use double digits partitions for page Border.$ R7 h7 g, E8 D$ t7 w
1139338 ALLEGRO_EDITOR DRC_CONSTR The total etch length does not seem to work for Xnets after setting the variable "retain_electrical_constraints_on_nets"
# w+ v; }, S& t1139361 ALLEGRO_EDITOR DRAFTING Angular dimension tolerance is incorrect when plus minus tolerances are equal.( }/ f& k3 X; b, t6 j' n( r- V
1141882 ALLEGRO_EDITOR EDIT_ETCH Allegro Crashes during diffpair slide% a9 R* S% l. U
1142876 ALLEGRO_EDITOR SHAPE No DRC error when airgap between place bounds exactly zero" q+ L/ V1 J! Y r0 l
1145235 CONCEPT_HDL CONSTRAINT_MGR DEHDL CM gives error when trying to launch SigXP
) Q: I/ e3 {5 t4 J. C4 h( R1145243 ALLEGRO_EDITOR NC Duplicate drills found in the NC Drill output2 K, {8 x3 t; M8 a! c& P: }7 {
1145260 SIP_LAYOUT DIE_EDITOR Enable "Copy" in die editor% b0 @9 G' D, e- R4 Z
1145284 CONCEPT_HDL CORE Publish PDF crashes DE HDL
8 A6 o2 [; j* I% S6 v1145333 ALLEGRO_EDITOR SHAPE SHAPE boundary may not cross itself. Error cannot be fixed.
7 T$ C9 R2 Z; A1 U1145856 ALLEGRO_EDITOR DRC_CONSTR DRC Line to Thru Pin appear while Fillet be added
$ g5 b; M5 i' l1 p6 Q+ H' D1146287 PCB_LIBRARIAN CORE PDV expand pins and change origin sets coordinates for few pins wrong and places pins on top of each other after collaps8 r7 r# W6 A) P* q
1146865 ALLEGRO_EDITOR DATABASE Allegro crashes when trying to place mechanical symbol
2 Y+ L& T& a& _, K# l8 e, N4 v1148513 ALLEGRO_EDITOR OTHER Importing a subdrawing file causes incorrect net name assignment.5 D) M% H* T' K. Y
1148734 CONCEPT_HDL OTHER Logical Symbol Text is turned upside down after extracting PDF by Publish PDF
6 d. {8 ]' k$ ^& f- E3 ]" f# Q1149025 ALLEGRO_EDITOR INTERFACES IPC-2581 imports cross-hatched shapes as solid) I d- n8 {! |' B8 A
1149948 APD OTHER Stream_out hangs on this design -- hang processing merge of overlapping shapes using poly_deletecolinear_only()1 F$ h6 y: t. a8 t) k
1150274 CONCEPT_HDL CORE Uprev from 16.3 to 16.6 is not preserving RefDes
% g5 J. }" P! m, y* O. ^1151450 SIP_LAYOUT DXF_IF DXF export from CDNSIP missing symbols# R4 C( P" q0 K9 r- z% }2 n$ c
$ D; s. v$ P* ^ m$ A
; m8 L6 x, A' k6 h0 L下载链接：
6 _6 J; N h5 @9 l# |6 Z: s) mhttp://pan.baidu.com/share/link? ... 5&uk=38260382941 I; p$ {# A" P9 x% j
|
评分
-
查看全部评分
|
/1 
发表于 2013-6-16 15:39
收藏
淘帖
支持！
反对！
期待16.7.。。。。。。。。
