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更新内容及模块：3 S6 s4 S3 o0 f7 _3 b
DATE: 06-14-2013 HOTFIX VERSION: 011
3 a4 N4 \8 d, K6 S, Y$ R4 u===================================================================================================================================$ y( w9 V) X8 D% N( U0 `% ?
CCRID PRODUCT PRODUCTLEVEL2 TITLE8 O L2 R$ l; _# b! k8 s& C
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, E* P- p" s$ v7 p982306 concept_HDL OTHER When plotting a PDF publisher output the page coming out half inch bigger in pdf
! Q6 i0 d8 a8 c5 S1055338 SIP_LAYOUT DRC_CONSTRAINTS Soldermask to Via drcs on bondfingers
1 ]0 w# [, Y! ^3 M$ l1093375 allegro_EDITOR PLACEMENT Align Module with Zero spacing value space the modules further away the modules should be nearer
" \1 N4 s1 l6 e& i6 t; `3 O- `1103201 RF_PCB FE_IFF_IMPORT Wrong permissions to map file during IFF import
; b3 p% r6 z" x! a1106900 CONCEPT_HDL COMP_BROWSER Component Browser performance utility should honor CPM directives for include and exclude PPT: O4 [# C8 g* a, S3 X ]
1110178 ALLEGRO_EDITOR EDIT_ETCH Line Width Retention should be controlled via setting, k( f7 f7 W( O6 s" p" t# H& d& P
1110323 APD DXF_IF DXF out is offsetting square discrete pads.7 R# ]9 I/ |4 c3 ^- x
1123581 ALLEGRO_EDITOR MANUFACT Dimension Line gets changed on board
0 ?( q% m7 o' H9 u1134083 CONCEPT_HDL OTHER Published PDF file's hyperlinks do not work fine when user use double digits partitions for page Border.
- p; n: W3 l0 U4 Y1139338 ALLEGRO_EDITOR DRC_CONSTR The total etch length does not seem to work for Xnets after setting the variable "retain_electrical_constraints_on_nets"
; m) t" y8 d+ F q# s1139361 ALLEGRO_EDITOR DRAFTING Angular dimension tolerance is incorrect when plus minus tolerances are equal.
$ s1 A' n8 @; g# O1 D- S1141882 ALLEGRO_EDITOR EDIT_ETCH Allegro Crashes during diffpair slide$ w" l$ Y h H" j9 w7 e
1142876 ALLEGRO_EDITOR SHAPE No DRC error when airgap between place bounds exactly zero
, y8 h9 \7 X6 |/ I; J/ `1145235 CONCEPT_HDL CONSTRAINT_MGR DEHDL CM gives error when trying to launch SigXP
2 I8 T. y: R) Y @& Y* _1145243 ALLEGRO_EDITOR NC Duplicate drills found in the NC Drill output
* y* Z: y# \- |4 v- r$ F. ?, L& ?3 N1145260 SIP_LAYOUT DIE_EDITOR Enable "Copy" in die editor; l3 n- t& l$ i0 C
1145284 CONCEPT_HDL CORE Publish PDF crashes DE HDL: H3 x f$ U% R0 f F A
1145333 ALLEGRO_EDITOR SHAPE SHAPE boundary may not cross itself. Error cannot be fixed.9 G# c2 M9 `# W) V! Z" }. ~
1145856 ALLEGRO_EDITOR DRC_CONSTR DRC Line to Thru Pin appear while Fillet be added
8 |1 [6 t. o( `1146287 PCB_LIBRARIAN CORE PDV expand pins and change origin sets coordinates for few pins wrong and places pins on top of each other after collaps
' Z8 E" h2 X! C+ m1146865 ALLEGRO_EDITOR DATABASE Allegro crashes when trying to place mechanical symbol
9 y9 a1 f8 `) i# J1148513 ALLEGRO_EDITOR OTHER Importing a subdrawing file causes incorrect net name assignment.9 \% M8 k5 }: D: D) k
1148734 CONCEPT_HDL OTHER Logical Symbol Text is turned upside down after extracting PDF by Publish PDF8 d, d+ [ D( ~
1149025 ALLEGRO_EDITOR INTERFACES IPC-2581 imports cross-hatched shapes as solid
1 q* f* W9 I; p* c/ I! C3 u1149948 APD OTHER Stream_out hangs on this design -- hang processing merge of overlapping shapes using poly_deletecolinear_only()
1 B1 J2 j5 ^% E7 A* p' ~1150274 CONCEPT_HDL CORE Uprev from 16.3 to 16.6 is not preserving RefDes% V% f0 q7 `* G j% k, x
1151450 SIP_LAYOUT DXF_IF DXF export from CDNSIP missing symbols9 s+ r% v2 }3 F4 y. d ?0 r
1 j- @" ?1 ~# b" x+ f: x, f, h
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发表于 2013-6-16 15:39
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支持！
反对！
期待16.7.。。。。。。。。
