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本帖最后由 stupid 于 2013-4-30 23:17 编辑
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某一天,一个叫马克的人发起了帖子,采用了滚动刷屏的方法,4个帖子,一个内容:招人3 o% i' r1 A$ q
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首帖Date: Mon, 7 Jan 2013 17:36:56 +0000
( c, a0 E9 H* @' I6 B" M2贴 Date: Fri, 15 Feb 2013 00:22:29 +0000
( U3 Z* }8 @ _( x3贴 Date: Thu, 14 Mar 2013 04:49:58 +0000
& F! M5 [' I, m2 \! {4贴Date: Thu, 25 Apr 2013 18:37:34 +00008 Y* x* C- d C1 S ?
0 R5 m1 ?" z# b4 RMy Team is looking for a Senior Staff Engineer(Backplane Architect)/Principle
' D7 N0 G3 O* U1 \( T# XEngineer;2 ^! G5 L. W9 \; d
Responsibilities/Description;
|, m' G' n- p( x- DResponsible for providing the backplane architecture and 10G+ High Speed SI! r3 _9 N& {" Y j0 K# E$ x+ g# g
solutions for Next Generation telecommunications equipment in the router,
+ s% w4 L" Q* A0 Q/ R9 @switch and transmission product lines to meet system design requirements.! x; _& P, R1 ~3 H" O* m% L8 n
Experience in co-designing of ASIC, Package, PCB and System interconnects
+ U. c% i9 a1 F0 idesired. including:
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- Design and analysis of multi-gigabit serial links for Backplane and
% {0 o7 F6 p6 B% E chip-to-chip interfaces meeting CEI, XFI, XLAUI, SFI, 10Gbase-KR, PCIe, and
3 o1 A L$ u+ \( u other standards.9 @8 L) H2 r# s8 M" [
- Familiar with ASIC, Hardware, interconnect teams to evaluate design
( N: r% {/ D9 p% Q. U tradeoffs and optimize design performance / risk / cost /manufacturability.
6 N* j7 V" Z: \6 L5 X& n4 G- To evaluate package designs, characterization of SerDes, and design
$ V9 Q @5 [* V7 l& M) | experiments to do the same.
7 d+ h/ a4 s4 m: Q- Modeling of electromagnetic 3-D structures.
. L+ b- Y* v \6 v- Modeling and analyzing power delivery networks (PDN).
9 h$ S" l( n' i- b* v, M5 ]- Familiar with memory technologies such as DDR2/DDR3 is preferred.
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Qualifications/Requirements:
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- Performing physical measurements to collect data for design2 v4 f: W& J# q" |- s9 p% W
validation and simulation correlations.: F9 k3 H. B& D5 Z4 d, }( @/ U
- Knowledgeable in using most major SI/PI tools: HFSS, CST, HSPICE,
" O! L7 m! ?, W6 Q2 M) ? Sigrity Tools, StatEye, ADS, Matlab, Cadence Allegro and APD, HSPICE, and% E4 [% Z7 I& c) a
other tools.
" ~( E4 A0 o' a g9 ^- Experience in correlating simulation results with lab measurements2 |- Z8 k v |8 m1 X
using oscilloscopes, TDRs, VNAs, BertScope is a plus. Must be self
7 u6 c' Y# q; K- | motivated with strong communication and teamwork skills.
% B8 b- y) ], e* D! b& ]' n6 ~9 j- The working experience in Core router or Edge router similar product
# J- ~$ e: b+ w8 X |# a* f3 e in large telecomm infrastructure company.) `6 n/ l1 y5 I p8 D- e" U$ M
A MSEE, or a PhD is preferred, with 10years of experience.* o! Z% m6 V7 D0 n/ F7 r
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Some portion of time will be spent in Shenzhen working with the HQ SI team. ( G0 b' X; z' x
Travel will be about 30-60% to China.
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Please contact mark.apton@xxxxxxxxxx
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插个广告,有符合以上条件,又愿意在深圳工作的人速速联系我 dbm@chinafastprint.com |
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