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获奖论文在各公司的分布情况
本帖最后由 stupid 于 2013-2-16 14:49 编辑
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. O" X2 R5 d$ k1. A reusable generic platform for validation and characterization of high speed mixed signal designs) y0 k# w- D; R9 @
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Rambus 出品。
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2. A rapid prototyping of FPGA-Based duobinary transmitter/receiver for high speed electrical backplane transmission
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/ `7 Z- U# d. \' M& j宾大和Agilent联手，Agilent方面是Mike Resso.) {+ l' N$ x' ~1 s& N
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3. channel to channel crosstalk behavior and design optimization for ddr4 memory buses
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$ G: X1 A) H+ Y4 WIntel，Xiang Li，DDR4连接器规范的制定者。
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4. signal and power integrity(SPI) co-analysis for high speed communication channels y; d( w5 v& Y/ W! B& G; [
+ N, b5 h; R0 U& c/ }. E# k4 J8 r" U; |IBM美德研发中心联手。
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3 p$ a( L; K2 s( f* G5. innovative PDN design guidelines for practical high-layer-count pcbs
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作者主要来自密苏里理工，其中Siming Pan 和Jun Fan都来自清华，后都就读于密苏里，俩人貌似有师生之谊。
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& k/ D' h! L/ _6. Time domain and statistical model development,correlation,and analysis methods for high speed SerDes
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LSI和Agilent联合，Agilent是Fangyi Rao。
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7. applying microwave techiques to digital systems: a simple case study
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Cray、SiSoft联合出品。
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9 M) _- Q$ V$ Z8. high throughput,hign-sensitivity measurement of power supply-induced bounded,uncorrelated jitter in time,frequency,and statistical domains- m- m9 \) J: W. j6 ?% \1 {
z" D. I- R+ y; n. W$ {% jAltera出品，3个作者都是亚裔，其中大家熟悉的Daniel Chow，以及一位疑似华人Shishuang Sun。9 D$ G' x+ v; a
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9. beyond 25Gbps:a study of NRZ and multi-level modulation in alternative backplane architectures
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LSI、TE联合出品* p& V* t3 e& t
7 L" W- {6 y j/ k8 t10. Memory interface on-chip PDN noise Charachterization,modeling and its impact on timing
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Altera出品，9位作者。 ], ~9 G) |% z& m3 v
5 E. K. L1 O8 K. C/ W+ d& t, V11. Enabling DFT logic and timing verification in mixed signal designs
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Rambus和Synopsys联合出品。5 w% l) b1 v/ ^
# S: W3 i; s* W$ s12. analytic solutions for periodically loaded transmission line modeling
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5 \3 a' K1 J) dIntel 和 Ansys 联合出品。- B" I- F% j% h
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13. power-signal co-integrity design for multi-Gbps low-power DDR3 mobile platforms7 n; s7 }. b) V$ @
3 }4 y, @% y# o( l7 |6 kSamsung出品，目前似乎还没有用LPDDR3的手机，但是毫无疑问，这将会很快成为智能手机的标配。
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14. power/Ground bump optimization technique on early design stage( ~. s y/ H$ \8 ~7 j; w
: D5 J9 {- G: [) J" DSmasung出品。
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15. DDR memory channel design from passive stub eqalizer perspective # K6 n7 {, Q8 ?2 `
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Intel，貌似1位华人 Qin Li。
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& l. }- {5 I$ L" z16. using power aware IBIS v5.0 behavioral IO models to simulate simultaneous Switching Noise
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6 G- t4 o% Q) r# q' UXilinx 和 Cadence出品，非常有用的SSN仿真文章。
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17. validating EMC simulation by measurement in reverberation chamber
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! V, H, X. Q9 S# V. H# Q; M1 g来自Cisco，作者中有4位华人，3位来自思科中国研发中心，分别是Xiaoxia Zhou，Hongmei Fan，Jinghan Yu: L/ v0 Y: v, t4 M' O
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18. 3D interposer design and electrical performance study
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Rambus 联合出品。/ D$ B: q4 \" X9 @. W
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19. Dramatic noise reduction using guard traces with optimized shorting vias
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Eric Bogatin和Lambert Simonovich联手' i- u3 N- k+ k( e$ {& G
0 g6 n' v9 c! p7 k/ e20. effects of ground via asymmetry on mode conversion for high speed differential signals) O2 {1 B" Y6 G$ R2 J
% B" b9 U: y/ h3 `) [IBM独家出品。 M) F: H( a# ^' R
1 u, b! b1 s7 z21. design and analysis of a high-speed parallel interface for 16Gbps coded differential signaling
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Rambus、Samsung联合出品。
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1 }5 G7 y# c p+ _% r: n+ `22. measurement-based simulation:increasing IBIS-AMI model Accuracy with Data from lab measurements
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SiSoft、Ericsson联合出品。' r) ]& R B% d; T1 Q
) C# i' n; s& U$ G; i _0 ~- k6 U23. accurate receiver clock positioning in high speed parallel buses ! F( E2 L) ^* r8 k6 m, G% ^0 ^" q
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Rambus、Altera、xilinx、Qualcomm 联合出品。) ?5 t: Y/ D" W( z9 M& L* g
$ @0 ]- l9 o6 {% a24. partial response and noise predictive maximum likelihood(PRML/NPML) Equalization and Detection for high speed serial link systems) p e- P4 K3 ^8 v
# k" `" z* D) R ~9 ]& N, R1 QLSI出品，3作者中有一个中国人，Cathy Ye Liu，1995年清华毕业，后去了美国。, T X2 D; }* ^" ]( O Q9 u" p
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25. Which one is better?comparing options to describe frequency dependent losses: [/ `0 }- O& e/ [9 p
' [1 O" V" d6 X0 z: Y; NEric Bogatin联合CCN，Simberian出品。& \. U$ ~5 @- k2 s1 g( y& @
: N8 p8 G0 i# f8 @26. a reverse nyquist approach to understanding the importance of low frequency information in scattering matrices
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Ansys出品! b) w9 z4 L6 ^
+ I, ^$ x7 R+ F; l: u5 z' ^4 T27. Terabit/s packaging design for testing of high speed IC transceivers
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3 l# O. Z" d- W% |出自鼎鼎大名的IBM T.J.Watson Research Center，Xiaoxiong Gu是众多作者中的一位。7 d0 [ s6 W% U( s0 @$ {% m' H
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28. Channel operating margin(COM):evolution of channel specification for 25Gbps and beyond
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! i( s8 W8 e7 q& BIntel、Altera联合出品，Mike Peng Li出手啦。
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从今年DesignCon的获奖论文看，Rambus依然是论文大户，共有5片论文获奖，其中4篇是和别人合作。Intel 4篇，2篇与人合作。Altera 4篇。IBM独自贡献了3篇。 Samsung 3篇，一篇和Rambus联合，跟最近整个三爽的势头一样，表现的很猛。LSI 3篇。Agilent、xilinx、Sisoft都是2篇。多产的Bogatin博士，也是2篇。仿真大户Ansys这次只收获了1篇。 整机厂商，如Cisco、Cray、Ericsson则均收获了一篇。0 I5 |+ }% h5 v4 O
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密苏里理工表现优秀，乔治亚理工则没有收获。/ F" A/ k/ g' R% S
' N' o' ~, L. z' Z6 d* P4 [1 J国内SI的领头羊，华为亦有论文宣讲，但未中奖。另外Qualcomm的有线部门开始发力，他们目前的重心应该在10G 以太网上。
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" Y- S! @' O- W4 n$ m, Y% M2 V& C另外，几乎每篇获奖论文的作者都有一个华裔，从侧面反映出来中国人苦逼，到哪儿都是做民工的命，呵呵……
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