|
Hotfix中只需要安装最新的版本即可。0 Q2 b+ `- h' J; a
Hotfix024对以下项目做了修正:
7 b0 G, o9 x9 HDATE: 06-20-2012 HOTFIX VERSION: 024
( J- Q5 m- S. E: b! ^+ s* H===================================================================================================================================% \3 K! Q; X& x' |0 O* b, z
CCRID PRODUCT PRODUCTLEVEL2 TITLE
2 m3 w& U9 {. c4 i0 V. i# t/ y===================================================================================================================================
0 e4 f N0 m5 o P982824 ALLEGRO_EDITOR OTHER Import placement fails with a zero length log file.
4 g- i: t! _. X- E4 \1006437 SIP_LAYOUT BGA_EDITOR SCM not loading the die if dies refdes and LFnames are changed( F& D* S' j# z) t5 P3 ~+ P
1011040 FSP PROCESS Feature to avoid connectivity between fixed voltage Output and variable voltage Input! U8 F: @, q/ @+ t2 p' h
1012985 ALLEGRO_EDITOR DATABASE Allegro crashes multiple times a day5 s, ~; h; Z+ s
1013644 ALLEGRO_EDITOR SHAPE Sliding trace with oops creates a duplicate shape islands
" ~! y% J& z' {: R: w0 R, e1014351 ALLEGRO_EDITOR OTHER Whenever we open a file (brd, dra) in PCB Editor with an OrCAD PCB Designer license,we get a warning SPMH0D-34
/ [1 A9 I4 V. ]1 s0 W+ L1014893 CONSTRAINT_MGR OTHER With CM open layout is extremely slow and Allegro crashes very frequently9 n4 z7 O8 M; t: Z1 v4 V
1015210 ALLEGRO_EDITOR DRC_CONSTR Deleting Via from an array casues DRC errors7 k& a, e& L. h
1016546 CONCEPT_HDL CONSTRAINT_MGR Wrong value of NET_PYSICAL _SPACING_TYPE in Attribute form
/ S% ~% U, d: v1016932 RF_PCB DISCRETE_LIBX_2A Incorrect Symbol Pin Numbers after import into ADS
4 p( o% \8 |) r$ B- s) ]+ p1017332 APD VIA_STRUCTURE Refreshing Via Structures results in shorting to power plane.
) g/ J1 Q- I) s' _2 ~1017931 ALLEGRO_EDITOR OTHER IPF import fails with error-IPF error : Illegal pen number! V. f- M/ D) f7 G& |
1018413 F2B PACKAGERXL Export Physical producing different results depending on how it is launched( }$ F+ b) j( N. R5 u
1018435 APD OTHER Oblong pads in Sip are not displayed correctly in the Stream_out .sf file.* a' \- }- E( { u Y7 d
1018936 ALLEGRO_EDITOR OTHER unexpexted DRC eror
/ Z r3 _; E0 K, F& n- _5 P8 S' M1018978 ALLEGRO_EDITOR DRC_CONSTR Update DRC changes DRC without any change in design
, |1 L4 t" n2 ~+ ^7 `7 X1019303 CONCEPT_HDL INFRA DEHDL custom outport displays error
) |( u& v( {. R, l5 g1 ]2 Y1019913 ALLEGRO_EDITOR DATABASE BUG:Bottom pins are also shown in DXF export
$ \* g! {5 j# a* k/ ]0 ]* c1019955 ALLEGRO_EDITOR SKILL axlRegionCreate and axlRegionAdd do not work in a symbol file.
& Z: V6 @3 j+ k: m! L1020749 ALLEGRO_EDITOR DATABASE 16.2 Parts not updating when opened in a 16.5 database
- Q( ^3 i+ j# y( k1020780 APD COLOR APD crash on assigning color to net using Color1926 I+ ~- R- P6 z4 k9 v* G
1021033 CONCEPT_HDL CONSTRAINT_MGR Cleared ecsets in 16.3 reappears as mapping errors without ecset names after uprev to 16.5 |
|