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Hotfix中只需要安装最新的版本即可。
G/ W0 E* `. O1 X" y* y, BHotfix024对以下项目做了修正：
" o- J3 N5 Z0 L) L2 H; L1 BDATE: 06-20-2012 HOTFIX VERSION: 0241 l, b$ L! o' D! c3 w3 \
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CCRID PRODUCT PRODUCTLEVEL2 TITLE# W6 R5 R, _1 u+ g! q
===================================================================================================================================: C+ Q2 v/ V; ]1 V: E6 D' t
982824 ALLEGRO_EDITOR OTHER Import placement fails with a zero length log file.( t( s4 D o8 I5 x
1006437 SIP_LAYOUT BGA_EDITOR SCM not loading the die if dies refdes and LFnames are changed1 i1 Z. |( |* v- `- r6 l, b/ j
1011040 FSP PROCESS Feature to avoid connectivity between fixed voltage Output and variable voltage Input
; Y, a* N2 `9 v" n1012985 ALLEGRO_EDITOR DATABASE Allegro crashes multiple times a day# l+ l2 J8 p4 h5 E
1013644 ALLEGRO_EDITOR SHAPE Sliding trace with oops creates a duplicate shape islands% M: y0 x% ]: M4 N2 f0 v; y2 b
1014351 ALLEGRO_EDITOR OTHER Whenever we open a file (brd, dra) in PCB Editor with an OrCAD PCB Designer license,we get a warning SPMH0D-34
* o; \$ \6 d2 b+ {2 o. u1014893 CONSTRAINT_MGR OTHER With CM open layout is extremely slow and Allegro crashes very frequently/ N& h0 \5 z2 r2 L1 }
1015210 ALLEGRO_EDITOR DRC_CONSTR Deleting Via from an array casues DRC errors! w& x- B" V6 {$ f' s6 t6 t
1016546 CONCEPT_HDL CONSTRAINT_MGR Wrong value of NET_PYSICAL _SPACING_TYPE in Attribute form8 Z: e* [- R# A1 n2 e
1016932 RF_PCB DISCRETE_LIBX_2A Incorrect Symbol Pin Numbers after import into ADS
; x' s( W! Q& o: n1017332 APD VIA_STRUCTURE Refreshing Via Structures results in shorting to power plane.
+ O. B# M8 Y% ?$ B3 G! F) Q) t1017931 ALLEGRO_EDITOR OTHER IPF import fails with error-IPF error : Illegal pen number) G; k0 N, O! m; K
1018413 F2B PACKAGERXL Export Physical producing different results depending on how it is launched# l, b; O$ D5 d4 K2 J, r
1018435 APD OTHER Oblong pads in Sip are not displayed correctly in the Stream_out .sf file.
9 e' e% v( c6 H1018936 ALLEGRO_EDITOR OTHER unexpexted DRC eror6 ?9 l7 s# Y+ z' _6 ^4 y1 X
1018978 ALLEGRO_EDITOR DRC_CONSTR Update DRC changes DRC without any change in design
6 n* u9 x$ r- B1019303 CONCEPT_HDL INFRA DEHDL custom outport displays error9 q, ?, B- M$ n; S) n# z# J
1019913 ALLEGRO_EDITOR DATABASE BUG:Bottom pins are also shown in DXF export
9 Z T5 ]& s m; P/ H1019955 ALLEGRO_EDITOR SKILL axlRegionCreate and axlRegionAdd do not work in a symbol file.& S6 _# P1 G. c/ }7 H2 v
1020749 ALLEGRO_EDITOR DATABASE 16.2 Parts not updating when opened in a 16.5 database
; m8 I7 C0 X9 x4 a% m1020780 APD COLOR APD crash on assigning color to net using Color192
2 i4 m- s& I% p/ d/ ?1021033 CONCEPT_HDL CONSTRAINT_MGR Cleared ecsets in 16.3 reappears as mapping errors without ecset names after uprev to 16.5 |
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发表于 2012-6-23 10:23
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