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Hotfix中只需要安装最新的版本即可。% Y, D& E( S1 o* `1 u8 u
Hotfix024对以下项目做了修正:
l9 @7 ?6 F! w4 jDATE: 06-20-2012 HOTFIX VERSION: 024+ ?# N y6 [ x- @; J$ L+ T8 J
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CCRID PRODUCT PRODUCTLEVEL2 TITLE3 _, Z; j% {9 {* J$ ?
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$ F* A' i4 G* L K3 D982824 ALLEGRO_EDITOR OTHER Import placement fails with a zero length log file.
, a: O3 q, k5 N' ?1006437 SIP_LAYOUT BGA_EDITOR SCM not loading the die if dies refdes and LFnames are changed
2 O7 x! L9 e: ~8 m c! f& Z' O% [1011040 FSP PROCESS Feature to avoid connectivity between fixed voltage Output and variable voltage Input
2 a) Z; n' h& K/ [- L: L% a9 A4 J. H. k1012985 ALLEGRO_EDITOR DATABASE Allegro crashes multiple times a day' a1 x; m. m, e8 C5 K- `
1013644 ALLEGRO_EDITOR SHAPE Sliding trace with oops creates a duplicate shape islands7 A, x3 S, ~1 g8 h
1014351 ALLEGRO_EDITOR OTHER Whenever we open a file (brd, dra) in PCB Editor with an OrCAD PCB Designer license,we get a warning SPMH0D-34" S7 e6 t, a- E L. ?/ G/ J5 @ s* O0 J
1014893 CONSTRAINT_MGR OTHER With CM open layout is extremely slow and Allegro crashes very frequently
$ z& ?+ Q% j9 X8 x' \1015210 ALLEGRO_EDITOR DRC_CONSTR Deleting Via from an array casues DRC errors
/ }( s7 c- ?7 ^$ G. U1016546 CONCEPT_HDL CONSTRAINT_MGR Wrong value of NET_PYSICAL _SPACING_TYPE in Attribute form$ m; p; G( G5 A; x5 U4 E# [( w9 @
1016932 RF_PCB DISCRETE_LIBX_2A Incorrect Symbol Pin Numbers after import into ADS8 K; U) ?% M9 {: ?: w, J
1017332 APD VIA_STRUCTURE Refreshing Via Structures results in shorting to power plane.
0 Q6 U9 K. d1 b/ A7 J( O# e1017931 ALLEGRO_EDITOR OTHER IPF import fails with error-IPF error : Illegal pen number; J# G* T/ l/ R( h2 a: b
1018413 F2B PACKAGERXL Export Physical producing different results depending on how it is launched
9 Y' B4 Z c" l, ]9 W7 N5 C1018435 APD OTHER Oblong pads in Sip are not displayed correctly in the Stream_out .sf file.
- ]7 ~* W# O8 |5 ~1018936 ALLEGRO_EDITOR OTHER unexpexted DRC eror
! b0 u. p- c) ?7 Z0 D1018978 ALLEGRO_EDITOR DRC_CONSTR Update DRC changes DRC without any change in design$ _2 C! C7 M+ \5 Z
1019303 CONCEPT_HDL INFRA DEHDL custom outport displays error) `6 x+ i9 F7 f
1019913 ALLEGRO_EDITOR DATABASE BUG:Bottom pins are also shown in DXF export( l; F8 J9 L; b3 e7 K+ x* {- {
1019955 ALLEGRO_EDITOR SKILL axlRegionCreate and axlRegionAdd do not work in a symbol file.
4 v& U, l1 V) [0 g" ~1020749 ALLEGRO_EDITOR DATABASE 16.2 Parts not updating when opened in a 16.5 database. U* G0 a( j9 T N
1020780 APD COLOR APD crash on assigning color to net using Color192% M9 @5 O( M9 a9 C+ K
1021033 CONCEPT_HDL CONSTRAINT_MGR Cleared ecsets in 16.3 reappears as mapping errors without ecset names after uprev to 16.5 |
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