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我是用capture作的原理图,在开始画板后,在allegro添加了四个定位孔,定义了这四个孔的参考名M1-4,封装(MTG240_600),引脚(pin number=1)又给它们GND的网络属性。
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现在板子画完了,我想backannotate回去到capture 里看看,结果我在capture 里的SWAP报告如下:6 `# S2 \; J/ r4 D
#99 No library part exists for COMP_DEVICE_TYPE=MTG240_600, please add Design Entry HDL Component in Allegro SI.
7 a1 K; r/ }" } Line Number: 43 v' N( s/ E& ]8 I/ g% t
#99 No library part exists for COMP_DEVICE_TYPE=MTG240_600, please add Design Entry HDL Component in Allegro SI.% \, I, B9 q- B" b: i3 J: V1 M
Line Number: 51 m2 E" h3 _1 K% W+ N6 T
#99 No library part exists for COMP_DEVICE_TYPE=MTG240_600, please add Design Entry HDL Component in Allegro SI.
8 K9 e( D3 G7 f Line Number: 6
) N: R- q9 q2 x1 j5 `, [$ z! }1 @4 v#99 No library part exists for COMP_DEVICE_TYPE=MTG240_600, please add Design Entry HDL Component in Allegro SI.+ A% G$ G+ D! E3 t( b, ~+ x3 [
Line Number: 7
: U5 J, G' |; n3 N: C! f* ]- p" S#1 Error [ALG0037] Unable to read physical netlist data.
6 W7 r9 x1 Q9 a2 E& W3 w#2 Aborting Swap file creation... Please correct the above errors and retry.% F, _; O" }* t0 ~7 n0 e+ \
下面是我的其中一个定位孔的element
* e' d) Q5 E' g; { \pin number: MTG1.1
& n1 O1 J: B2 u! E7 G0 c! I0 y pinuse: UNSPEC
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% f& |, M' q' W/ ?( N location-xy: (-48.3870 35.8140)
) E+ r- ], C0 I2 l# F part of net name: GND! X- `3 l2 F) z- u! ]' b
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Connected lines: 1 ( BOTTOM )" H3 g5 g) T3 F0 _# e
Connected shapes: 2 ( TOP BOTTOM )
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- b$ ^ d4 e7 b+ Y. [ padstack name: PAD_MTG240_600$ H0 } L" l4 S# f8 M3 R
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padstack defined from TOP to BOTTOM, ]. |& b# Y3 X0 S7 m+ }
padstack rotation: 0.000 degrees
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Attached text:
$ P9 w. @+ B+ G1 U class = PACKAGE GEOMETRY4 A5 p; J! j3 c9 {3 E
subclass = PIN_NUMBER
9 o+ C" F8 W$ w- I value = 1
$ H; ~* S; ^ u$ N不知道capture里面这个错误该怎么办。这四个定位孔在原来的原理图里是没有的,也不具备网络属性,我直接在allegro给加上的。
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0 K8 M3 @1 }5 m3 O( Y[ Last edited by jasonzou at 2008-6-28 20:21 ] |
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