TA的每日心情 | 奋斗 2023-5-4 15:40 |
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签到天数: 1 天 [LV.1]初来乍到
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orcad Library Builder导出封装没有焊盘,结合咱们网站上的帖子也看了一遍,但是还是没解决,烦请各位大神出出招。
: A O$ {' l0 l) r4 H3 `3 Y! Z8 U前边直接使用IPC1573标准创建了一个电阻的封装,打开allegro以后运行过程如下:0 x( _1 f( a* K
Loading axlcore.cxt
, w" [& @- N0 L4 [) O/ g# v; yStarting new design...
6 J; R, h9 c" Z, O: {+ bReading Footprint XML
, b: r- Y; j$ P7 y( g! [- HCreating padstacks
! U2 f! @# X# jStarting new design...
1 A& Q! R v! Z/ _1 g5 nPeRForming DRC...& a7 [& C- m- D; U2 ?& i# v" D3 C
Multithreaded DRC update (8 threads).
' \5 I8 v' D! m3 {$ oNo DRC errors detected.
3 f* c. a# X2 P' m4 D$ bPerforming a partial design check before saving.
& }/ Y" F# b# [, fWriting design to disk.0 b1 c) M3 n1 z( | X" ^$ ~9 _
'r215_300.pad' saved to disk.) h" ]# Z" K% G, a% a: S& H
Opening Design "RESMELF7028N.dra"
. m2 W: e5 ~7 E9 A' XW- (SPMHUT-48): Scaled value has been rounded off." O8 E+ t* s; \; z( o9 p8 J1 d ?
Starting new design...- U' B A- b* J, M+ V1 [/ I* n* A
Creating Shapes on Package layers' o9 g& N! L! _$ n7 A) a
Creating Pins
- w/ _! a4 ?+ P! i" x$ C( w0 p& I# Q% uCreating Vias
0 d. x' b5 t% U9 LSymbol Created
2 Q+ }+ X* Y- C2 w5 H% d, mCreating package symbol 'E:/cadence/RESMELF7028N/RESMELF7028N_Allegro/resmelf7028n.psm'.4 |& R6 ~0 `3 T) Y2 {
Starting Create symbol...+ ^8 {1 @! A* `; p; f G6 ]" R
create_sym completed successfully, use Viewlog to review the log file.8 i3 A) b) x2 Y. \3 |
create_sym completed successfully, use Viewlog to review the log file.
5 l1 D1 m1 H2 J* v0 lSymbol 'E:/Cadence/RESMELF7028N/RESMELF7028N_Allegro/resmelf7028n.psm' created.
: @2 ?2 P( I; R3 \# ]! `Loading cmds.cxt / o- d8 L( \7 a$ S5 O! a
Loading skillExt.cxt
% U2 @9 m. ?" g# O' uE- (SPMHA1-161): Cannot open the design database file ... run standalone dbdoctor on the file.
+ r) V' p' t* U0 o0 yPerforming a partial design check before saving.
! v" l" |/ @. z* K( f' S- c$ E' J8 M: ]) {Writing design to disk." x1 |2 i; g" L5 H( v5 p
'RESMELF7028N.dra' saved to disk.7 |6 x% W, h6 Y
Opening existing design...
- I% U5 F9 s/ j6 z' q# aSymbol Saved& l* e0 Q) U8 \
t
3 Z% m0 [- Z; g# l. ICommand >
# L( S, C6 ^" G# A5 B* |5 u( @) @ 电脑没有安装skill,allegro用的是17.2,OrCAD Library Builder用的是老吴网站提供的最新版。问题出现后,在allegro中设置了路径,还是问题依旧存在; T' d. l! H& G9 U. D/ N1 X- v
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