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Hotfix_SPB17.40.012更新

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发表于 2020-11-4 12:16 | 只看该作者 回帖奖励 |倒序浏览 |阅读模式

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本帖最后由 auto1860 于 2020-11-4 13:30 编辑 8 f& |; x: j" f1 T! o, ~
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链接:https://pan.baidu.com/s/1f4DTDBhhjcKz4On13yCxSg - L! r2 _/ j5 Y1 J& o
游客,如果您要查看本帖隐藏内容请回复
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Fixed CCRs: SPB 17.4 HF012; Y; i2 H4 ~& t4 W; o/ o
10-30-2020
+ _4 V9 _) E" _( e: ?========================================================================================================================================================' ~, u, Z  H, t) U
CCRID   Product            ProductLevel2 Title; r% @! H$ z; N# q% M  J- X" V7 C, @% W2 q
========================================================================================================================================================0 l) _  T2 _& Q; a. W, D
2324284 ADV_PKG_ROUTER     OTHER         APR fails to route and does not use the BBVias.
. o2 W7 L+ V/ K8 K' M9 _; v2346605 ADW                ADWSERVER     Librarian license incorrectly checked out by data nodes during LiveBOM creation
; M4 k. O" |( {. ?3 P2317952 allegro_EDITOR     3D_CANVAS     Allegro 3D Canvas does not show STEP models placed on paste mask correctly/ i, V* @2 |1 M- {0 T. D+ ?1 d8 G8 r# g
2192222 ALLEGRO_EDITOR     DFM           Allegro PCB Editor crashed during check 'Mask' with the setting of 'Via Partially Covered With Mask Opening'2 M! \$ m7 u/ x: w, @; m4 Y& b; E
2197203 ALLEGRO_EDITOR     DFM           Wrong alert on Soldermask sliver checking
! \% ^! ~0 m7 g' @3 p; S0 Q2280806 ALLEGRO_EDITOR     DFM           Importing netlist results in error related to illegal subclass (SPMHNI-234)
0 i: a' i7 q* T& X2262559 ALLEGRO_EDITOR     DRC_CONSTR    Copper Features: Minimum Acid traps Angle gives false DRC* }! y1 `! f5 A- ~
2319385 ALLEGRO_EDITOR     INTERACTIV    Find by Query for Via structures is not working with Symbol field filter
4 C( _. f% q: H& D9 T: ]8 W9 m2279179 ALLEGRO_EDITOR     PLOTTING      File> Plot ignores the printer setup properties and always prints in Portrait format.
  D; I, |, a6 a6 h! r2306419 ALLEGRO_EDITOR     PLOTTING      File -> Plot -> Properties only accepts 'Portrait' and not 'Landscape'4 a. e4 @$ X( h1 x
2333930 ALLEGRO_EDITOR     PLOTTING      The File> Plot always prints PCB in portrait
: o% _% W' [& f( h2327088 ALLEGRO_EDITOR     SHAPE         Design Sync gets a SAV file reported but there is no information about the cause of the problem in netrev.lst: g! B+ g* x/ g; B
2331947 ALLEGRO_EDITOR     SHAPE         When adding shape, pressing the 'Shift' key ends the process# a* z+ m' G& N: f: L+ k; n/ L
2339008 ALLEGRO_EDITOR     STREAM_IF     Stream import view layers give error
) O% ]- s1 q, ^  |2328322 APD                DRC_CONSTRAIN Database getting corrupted during artwork creation even after running DBDoctor.
- Q( P! {5 `% F& h8 g2280535 APD                REPORTS       About the missing fillets report result: Ignore fillets not generated inside via regular pad area
* L( i: j% q2 K! l7 ~3 F2323629 CAPTURE            OTHER         Product unusable with DSN file: Operations have significant delays and application stops responding
# l7 y* _* \1 ]2261147 CONSTRAINT_MGR     ANALYSIS      Setting "Mechanical drill hole to conductor spacing" does not flag DRC
3 N  N# r  [1 i+ n6 V/ E2330712 CONSTRAINT_MGR     DATABASE      Physical Constraints Set value cannot be modified9 D  P3 B( }* r6 Q- |) F3 k
2333755 CONSTRAINT_MGR     SCHEM_FTB     CM simplified out-of-sync pop-up form has clipped text% ?+ t8 u/ p7 S4 m, \7 ^# {
2235714 CONSTRAINT_MGR     UI_FORMS      Using the 'Change all design unit attributes...' pop-up menu option changes only the Min BB Via Gap value3 y9 g( k" ], t2 E  D# J7 o
2288109 CONSTRAINT_MGR     UI_FORMS      Column sort is not working for match group; J- \- X* K" `6 q6 Q1 c" a
2306092 CONSTRAINT_MGR     UI_FORMS      Display Constraints shows empty constraints in Constraint Manager
8 r% O0 z! d' E9 j* y2332795 CONSTRAINT_MGR     UI_FORMS      CMGR Worksheet colums are not sorted as per the columns definitions
# y" U. B  Q' g& S% u6 @2326995 PCB_LIBRARIAN      SYMBOL_EDITOR Graphics and pin number locations are incorrect2 `4 M: I" u. z  o7 v+ @, h3 H
2280766 Pspice             MODELEDITOR   Error while converting Verilog-A model
; B/ P9 z) G( k2 a2285008 PSPICE             MODELEDITOR   Model Editor crashes if file name does not match with IBIS model file name3 J7 A' _% K; D4 B. b3 U+ ?$ ?% Q
2346048 PULSE              ADHOC         Importing or File New Block as a designer working on a design that has been shared does not work
  j2 K$ u' W$ Q/ D/ [) [2346643 PULSE              ADHOC         System Capture crashes when adding a part
. F; Y9 N& s& ]# H- H: G$ m; G2214054 PULSE              UNIFIED_SEARC Unified Search does not honor operating system HTTP proxy settings1 Y- n9 y4 g& O' `& l
2325635 PULSE              UNIFIED_SEARC Errors in Unified Search (vista) using customer database4 \4 Q* Y) L3 U( G( H( z
2326089 PULSE              UNIFIED_SEARC Unified search does not show EDM parts and gives error (SPPSUN-1)
7 k" v' d; K# C4 h2329750 PULSE              VERSION_ON_SA Live BOM data disappearing from migrated DE-HDL design with variants
# z5 `5 G, n. x" D( |. B3 F2319690 SIP_LAYOUT         EDIT_ETCH     Allegro SiP Layout XL - Auto-I Breakout Closest End excessive run time: Takes long time to complete
$ ~* E1 F/ T# n" I* ]2320336 SIP_LAYOUT         EDIT_ETCH     Auto-Interactive Pin Swapping /Auto Breakout cannot route in design
  ^5 E; ~: D+ b  ?6 x+ V1 m8 l" e2333679 SIP_LAYOUT         INTERACTIVE   Add Offset Via Angle Field2 j9 n1 y6 E) L
2344732 SYSTEM_CAPTURE     DESIGN_CORRUP Page cannot be loaded because the design database is corrupt2 k- u/ h/ I6 ]6 e% t9 J
2342258 SYSTEM_CAPTURE     MISCELLANEOUS System Capture is impacting PCB Editor GUI Readability by Setting QT_SCALE_FACTOR
' S' o+ @$ y3 N% E  i  e8 _2337610 SYSTEM_CAPTURE     PART_MANAGER  System Capture crashes when updating a part with changed PACK_TYPE and Symbol$ s* d6 C+ M2 D
2341550 SYSTEM_CAPTURE     VERSION_ON_SA Projects migrated from HotFix 002 to HotFix 010 have slow peRFormance
' q2 U/ k+ X, n& X- D0 E5 o* v9 b- @2341591 SYSTEM_CAPTURE     WIRING        Moving wire segments still leaves odd pieces of wires1 \$ @# C' B$ l. n# W

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发表于 2020-12-11 17:22 | 只看该作者
1111111111111111111111111111111111111117 q8 C" a& p' a* |. b5 C6 o

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发表于 2020-12-7 19:24 | 只看该作者
感谢,装了11号补丁,总是莫名报错退出,& @7 F; @9 u6 N1 n5 z0 k

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发表于 2020-11-4 14:11 | 只看该作者
更新到现在可以顺畅使用了吗
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2#
发表于 2020-11-4 12:18 | 只看该作者
终于见到有更新的了,多谢!/ R( N, c: w( O, @& h
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    2021-7-21 15:48
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    5#
    发表于 2020-11-4 14:11 | 只看该作者
    多谢楼主的分享!
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    7#
    发表于 2020-11-4 14:16 | 只看该作者
    多谢楼主的分享!
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    11#
    发表于 2020-11-4 16:24 | 只看该作者
    更新好及时啊,感谢分享啊
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    14#
    发表于 2020-11-4 17:26 | 只看该作者
    感谢楼主分享/ P& K, g  l- R

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    15#
    发表于 2020-11-4 18:32 | 只看该作者
    感谢感谢vvvvvvvvvv  z# O5 _6 G) z% y. N; X8 i# g
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