Hotfix_SPB17.20.054_wint_1of1.exe

yangquan3

Hotfix_SPB17.20.054_wint_1of1.exe
, y4 Q; ^" \% g% b下完了
链接: https://pan.baidu.com/s/1r_llgvrGH_bebfSWaR7_5A 提取码: jpbn 复制这段内容后打开百度网盘手机App，操作更方便哦
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linguohua

Fixed CCRs: SPB 17.2 HF054
04-26-2019
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1 R$ M' j- F; J, `$ P% W6 ICCRID   Product            ProductLevel2 Title
, c# b. h# b6 x* h6 C========================================================================================================================================================
2060269 ADW                DBEDITOR      Unable to create ECAD type mixed-case schematic model attributes
2030086 ADW                LRM           Cache part_table.ptf made by LRM Update cannot be read if it has null value in key property
( J: Q$ O% F  }( i* _' n6 o- P' q6 V1975317 ADW                PART_BROWSER  Space at the end of line in CDS.LIB results in zero libraries being shown in new component browser
2076340 ADW                PART_BROWSER  .helix folder needs to be deleted for PTF changes to take effect and to convert a design to cache
2025147 ADW                TDO-SHAREPOIN Design Management stops responding when a board file is deleted and then checked in with the same name
2025201 ADW                TDO-SHAREPOIN Getting error message (SPDWSD-20) when logging in to team design
( i; o# n- A* L: S8 S" X6 Z5 J2056694 ADW                TDO-SHAREPOIN Design Management stops responding on checking in an object with the same name as a previously deleted object
' C* |4 n* @1 H( Y7 S2054243 ALLEGRO_EDITOR     3D_CANVAS     Plating is not shown on stacked vias in 3D canvas
& N3 k& _0 F+ Q7 m2054327 ALLEGRO_EDITOR     3D_CANVAS     3D Canvas error: All bend operations are disabled due to licensing and/or DLL installation
2044980 ALLEGRO_EDITOR     ARTWORK       'Import - Artwork': PCB Editor stops responding and no artworks are loaded
+ O- F, ]. l1 x2060489 ALLEGRO_EDITOR     COLOR         SKILL axlGlobalVisibility() issue in a partition file: VIA/SOLDERMASK_TOP subclass visibility not turned off
1 J; x! |( P: j2072695 ALLEGRO_EDITOR     COLOR         Clines of colored nets not colored when 'display_nohighlight_priority' is set
: E; E2 `% h. D  J9 r1 P2 s2061203 ALLEGRO_EDITOR     CROSS_SECTION Importing cross-section from single stackup to multiple stackup adding additional layers to the primary zone
% ~1 [; A6 `4 N& t2010812 ALLEGRO_EDITOR     DATABASE      PCB Editor STEP model offsets should follow origin movements
/ l' [9 Y* h* L$ }7 i: |2011993 ALLEGRO_EDITOR     DATABASE      Change STEP model mapping when Symbol Origin is changed in DRA using Setup > Change Drawing Origin
9 W# \: ]. o& K$ N$ V1 S2051596 ALLEGRO_EDITOR     DATABASE      Error for unsupported property in element
2056497 ALLEGRO_EDITOR     DATABASE      Place manual is slow
6 O+ w' q" _/ y7 W2059489 ALLEGRO_EDITOR     DATABASE      DBDOCTOR in batch mode with argument '-check_only' detects text error
2064268 ALLEGRO_EDITOR     DATABASE      PCB Editor crashes when running SKILL code
2068588 ALLEGRO_EDITOR     DATABASE      Crash on opening release 16.6 design in 17.2-2016
2 V( ]4 Y& J+ N5 E; b2079131 ALLEGRO_EDITOR     DATABASE      axlChangeNet crashes PCB Editor in fast shape mode with Microsoft Visual C++ Runtime Library Error
0 r+ n& e1 \* p$ j  }0 C' z0 t2034759 ALLEGRO_EDITOR     DFM           Importing DFT constraints on board does not assign csets to design but shows the csets
9 u1 X* P9 ?- E& ^) N$ `: @* o- c2039992 ALLEGRO_EDITOR     DFM           Cset is not set in Pastemask element of DFA when importing XML Constraint File.
* f1 ^  q0 g1 a4 O1 ~/ A% P2046824 ALLEGRO_EDITOR     EXTRACT       Extracta ECL_NETWORK View reports incorrect pin layer.
2048912 ALLEGRO_EDITOR     IPC           Running PCB Design Compare - Graphic mode reports ERROR (SPMHA1-273) 'Shape intersects with itself'
3 a) {, _2 D0 l7 p% M2066597 ALLEGRO_EDITOR     IPC           Graphical compare not completed because of self-intersecting shape locations
3 e6 c& U; b' W4 U) V2079719 ALLEGRO_EDITOR     IPC           IPC2581 import fails with error 'Failed to add (LW)POLYLINE'
2066229 ALLEGRO_EDITOR     NC            Tool code missing in backdrill NC file on choosing 'Optimize Drill Head Travel' in NC Drill
2070379 ALLEGRO_EDITOR     NC            After running backdrill some vias are shorted to other nets
2041881 ALLEGRO_EDITOR     PAD_EDITOR    Difference in locations of drill in pad editor and symbol editor
2058852 ALLEGRO_EDITOR     PAD_EDITOR    Net associations lost on refreshing vias
2061580 ALLEGRO_EDITOR     PAD_EDITOR    Lock Layer Span settings specified in padstack editor not reflected in PCB Editor
) Y. R: y7 M: |! d& F# d2048116 ALLEGRO_EDITOR     REPORTS       Extracta command files not visible in Tools-->Reports when there is a space present in the textpath variable
2038949 ALLEGRO_EDITOR     SCHEM_FTB     Netrev is slow if there is an input board file with many modified components
6 G" t0 a8 |% z/ ^7 `2052758 ALLEGRO_EDITOR     SCHEM_FTB     Connectivity objects are being reported as Added and Deleted in Constraint Differences Report
8 e3 i7 m+ L; N7 w2066099 ALLEGRO_EDITOR     SCHEM_FTB     Inconsistent net names on export physical after changing net names in DE-HDL
2043882 ALLEGRO_EDITOR     SHAPE         Shapes not updated to 'Minimum aperture for gap width' in Global Dynamic Shape Parameters window
/ Y; N7 o/ T# T( Q2 {9 Q' i3 a  p2048483 ALLEGRO_EDITOR     SHAPE         Shapes not getting updated post backdrill update
, x+ r: D, u  u+ ^% J; B: X2052063 ALLEGRO_EDITOR     SHAPE         Cannot import IPC2581 due to 'Shape intersects with itself'
2056478 ALLEGRO_EDITOR     SHAPE         Editing shape by sliding segment causes PCB Editor to fail due to 0-length segment in shape
2058017 ALLEGRO_EDITOR     SHAPE         Shape not voiding correctly when fillets are present
+ _  O& a3 f) h- x! M# F* R3 @' E0 Q5 d2066473 ALLEGRO_EDITOR     SHAPE         Teardrops create strange copper shapes
2079698 ALLEGRO_EDITOR     SHAPE         IPC2581 import fails with error 'Shapes intersects with itself'
2010569 ALLEGRO_EDITOR     SKILL         Using SKILL to add 'nil' to a DRC object following a 'println' statement crashes PCB Editor in HotFix 048.
2055055 ALLEGRO_EDITOR     SKILL         Using SKILL to add a 'nil' property value to a String causes Allegro PCB Editor to crash
2023755 ALLEGRO_EDITOR     STEP          Export STEP includes enclosure even when it is not selected.
1881233 ALLEGRO_EDITOR     UI_GENERAL    Green/white canvas without grid when creating a board file (File - New)
' z6 [5 u9 _% m1900525 ALLEGRO_EDITOR     UI_GENERAL    Resizing the update symbols UI causes the options to overlap and jumble up (refresh issue)
  N" K/ I* X( N( r+ z9 X2003861 ALLEGRO_EDITOR     UI_GENERAL    Same y-coordinate returned for different vertical positions when creating board outline in HotFix 048
4 Q6 G1 K6 Z* E! O% v# {, F5 f2033958 ALLEGRO_EDITOR     UI_GENERAL    Incorrect canvas display on creating a design from the Start page and then opening an existing design
2053496 ALLEGRO_EDITOR     UI_GENERAL    Confirmation dialog is behind canvas
2054429 ALLEGRO_EDITOR     UI_GENERAL    Editor stops responding until choosing Done after clicking Zoom by Point twice
2059707 ALLEGRO_EDITOR     UI_GENERAL    'HTTPS' links are not shown as hyperlinks when using allegro_html
+ A9 l; z* u2 d2063423 ALLEGRO_EDITOR     UI_GENERAL    Blocking dialog popped up by axlUIPrompt() goes behind the canvas and is hidden
2038105 APD                DRC_CONSTRAIN APD crashes on update DRC in release 16.6
2050674 APD                PARTITION     Cannot remove C-Point from a partitioned design
2068814 APD                WIREBOND      Bond wires cross on auto-separate
% @4 ~# d6 {) v& [1967433 CAPTURE            OTHER         Cannot open DSN or OPJ files by double-clicking if Capture is already open
3 G* z4 ]) h8 ^" A0 x  q" M  E1967332 CONCEPT_HDL        COMP_BROWSER  Crash in customer environment on clicking on last row border in PIM after filtering
2001759 CONCEPT_HDL        COMP_BROWSER  Using Modify Component crashes Design Entry HDL
2020788 CONCEPT_HDL        COMP_BROWSER  Intermittent crash when clicking bottom edge of part selection table in the Modify Component window
2053578 CONCEPT_HDL        CONSTRAINT_MG Values specified for custom properties are not preserved
2013002 CONCEPT_HDL        CORE          Ability to regenerate Netgroup names to remove '_1' suffix
9 e" G1 Q1 C, l& b: N* V) X2026637 CONCEPT_HDL        CORE          DE-HDL crashing often when launched from EDM Flow Manager
: z# \1 F) K; c4 Z2041145 CONCEPT_HDL        CORE          Set font size & color of netgroup names and netgroup taps
0 m8 r8 ~! {6 w- i0 y! z2056743 CONCEPT_HDL        CORE          NetGroups appended with _1_1, some are empty, and inconsistent in DE-HDL CM and Allegro PCB Editor CM
2065889 CONCEPT_HDL        CORE          DE-HDL Modify command moves location of attached symbol properties
2 s) C5 h, V0 `5 Y5 P2074410 CONCEPT_HDL        CORE          Full net connectivity not shown in Allegro PCB Editor.
2045717 CONCEPT_HDL        RF_LAYOUT_DRI The RF PCB Options is greyed out when doing Import Physical on Linux with enterprise licenses
2045274 CONSTRAINT_MGR     CONCEPT_HDL   Running SKILL script or navigating pages in the hierarchy viewer crashes schematic editor
2 x! b3 a% N0 I2050521 CONSTRAINT_MGR     OTHER         Unexpected Xnet removal from schematic when Export to PCB Layout is executed.
1 n8 w3 F. {1 e4 k2066270 PCB_LIBRARIAN      SYMBOL_EDITOR Unable to edit note text containing comma
2069181 PCB_LIBRARIAN      SYMBOL_EDITOR Pinlist window expand/collapse buttons act weird first time when invoked.
2070007 PCB_LIBRARIAN      SYMBOL_EDITOR Project not found error in Symbol Editor when path contains space character
2072793 PCB_LIBRARIAN      SYMBOL_EDITOR Right-click menu of formatting text objects is not consistent: second and third options are swapped
8 y! J- r* ]7 k+ G! W3 p2073138 PCB_LIBRARIAN      SYMBOL_EDITOR New Symbol Editor: Do not allow duplicate properties
1957458 PSPICE             FRONTENDPLUGI Refresh issue with Bias Display on a new design: bias value not updated
& K  y  f& |% @- B" n1 R; N; I# a2022211 PSPICE             FRONTENDPLUGI Bias Point results are not updated
2031058 PSPICE             FRONTENDPLUGI PSpice bias values are not getting updated
7 X5 j/ h- N4 D+ Z$ e7 ^2038021 PSPICE             FRONTENDPLUGI Bias display is not updated
2055274 PSPICE             FRONTENDPLUGI Capture crashes on SIMSETUP OK when two projects are open
2053432 RF_PCB             OTHER         Property on RF component not transferred to new design not containing the component
2003341 SCM                SCHGEN        Unable to generate a schematic for hierarchical blocks
2069924 SIP_LAYOUT         DIE_ABSTRACT_ Conversion from co-design die to standard die / BGA / anything else must remove floating function pins.
2067894 SIP_LAYOUT         OTHER         sip database size is enormous for a small component definition used in fdesign
6 V# ]0 ]  S" ?2067987 SIP_LAYOUT         OTHER         Orphaned die attachment in SiP Layout cannot be removed
2072857 SIP_LAYOUT         OTHER         SiP Layout crashes when using Find by Query and choosing 'Symbols'
2068973 SIP_LAYOUT         REPORTS       SiP Layout Missing Fillet report not catching a missing fillet in HotFix 051 and 052
2059533 SIP_LAYOUT         SYMB_EDIT_APP SiP Layout: Cannot rotate bumps in Symbol Editor application mode
4 y: h/ w  [; e7 u* W/ E, q9 ]( G1981749 SYSTEM_CAPTURE     ARCHIVER      System Capture: Archiving a design from the Tcl command window results in error
' L6 Z$ i( h! r1 e" w) y2054869 SYSTEM_CAPTURE     AUTOMATION    syscapUtils.tcl command cnsAutoCreateDiffPair is broken due to missing acm_code.il and acm_config.txt files
: d, y+ y! G. s1966488 SYSTEM_CAPTURE     CANVAS_EDIT   New folder rename box does not show the text typed.
3 B/ w% Y. G, O1814813 SYSTEM_CAPTURE     COMPONENT_BRO System Capture session log should specify the CDSSITE path for the current session
1977673 SYSTEM_CAPTURE     COMPONENT_BRO adding reference blocks through add component error when cell name matches design name
& |8 n( Z9 `0 i; w! t" I0 I: d- z2027100 SYSTEM_CAPTURE     COMPOSITE_FIL pstdedb.cdsz and netlist preview in System capture is not being updated when individual netlist files are written
1961274 SYSTEM_CAPTURE     CONNECTIVITY_ Xnet removed during pin swapping
2041879 SYSTEM_CAPTURE     CONNECTIVITY_ xnets on net with only pull-up resistor
0 f, c- s+ ]% D1 r& C1889238 SYSTEM_CAPTURE     COPY_PASTE    Wire fails to connect during copy and paste
1993146 SYSTEM_CAPTURE     DESIGN_EXPLOR Cannot move page up by only one position
1910941 SYSTEM_CAPTURE     MISCELLANEOUS Parts that are not in any schematic page appear in netlsit and BOM
$ N; }3 A# X% ]3 `1 P* x1902347 SYSTEM_CAPTURE     PRINT         Prints all sheets if one sheet is specified as the print range
2041272 SYSTEM_CAPTURE     SMART_PDF     Smart pdf displays component outline when component is not de-highlighted.
  P" M& T) \9 Y+ ~2 c6 u0 B( L2065768 SYSTEM_CAPTURE     SMART_PDF     Custom Variable in Table Object not getting passed to PDF
9 c2 n  N, H$ W6 C1969243 SYSTEM_CAPTURE     VARIANT_MANAG Export variant does not name file correctly if the filename contains a space
1990258 SYSTEM_CAPTURE     VARIANT_MANAG Cannot paste copied preferred part to multiple parts with the same part number
5 `! V, S0 d3 a9 Y$ }' X1 P9 G& w) K1992250 SYSTEM_CAPTURE     WORKSPACE     Double-clicking a .CPM file runs System Capture but does not open project

linguohua

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金志峰 发表于 2019-5-4 01:01
麻烦先发个ccr看看吧

抱歉，本来想复制到回帖里面，发现格式全乱了。因此直接看下面连接比较好：
. P: K4 O, ~% B  w2 whttps://electronix.ru/forum/index.php?app=forums&module=forums&controller=topic&id=138247&page=5

linguohua

金志峰 发表于 2019-5-4 01:01
9 x0 Y2 L3 F" K* X$ ^麻烦先发个ccr看看吧

https://electronix.ru/forum/index.php?app=forums&module=forums&controller=topic&id=138247&page=5
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th2010-gc01

更新得真快啊！

ethernet

更新頻率真是令人嘆為觀止。。。

llntech

good

llntech

good

逸步舞秋风

给个网盘链接把 威望太贵了

kewin_wang

感谢楼主！

金志峰

楼主貌似下了几天了。。。

金志峰

麻烦先发个ccr看看吧

Geant168

great

vasylll

thank

Deny

thanks