quartusii和modelsim联合仿真时，出现如下故障怎么办？？？？？

abcde1234

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: L; S3 g7 p' w% N- n; Vvsim -t 1ps -L altera_ver -L lpm_ver -L sgate_ver -L altera_mf_ver -L altera_lnsim_ver -L cycloneive_ver -L rtl_work -L work -voptargs="+acc"  flow_led_vlg_tst
# vsim -gui "+altera" -l msim_transcript -do "flow_led_run_msim_rtl_verilog.do"
+ i& P& }, O% G* p6 `7 v# Start time: 15:52:59 on Nov 23,2018
# ** Note: (vsim-3812) Design is being optimized...
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# ** Fatal: Internal Error - vopt returned success but vsim could not find a design to simulate!. Please contact customer support for further assistance.
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7 o3 ~% m9 _' _5 `* f% x  U# |, q# Error loading design
" i/ `) I5 O/ F: }  z9 F7 W# Error: Error loading design
#        Pausing macro execution
9 ?) Q+ V% l6 S) S3 B. K1 A# MACRO ./flow_led_run_msim_rtl_verilog.do PAUSED at line 40

wu68aq

this question ask good