/ Z( i2 X1 X0 d, j( y& Ffile:///C:/Users/F2159499/AppData/Local/Temp/artED06.tmpLAN
' P8 S# b# W/ E
uthe length of the LAN signal traces should be kept as short as possible(<3000 mils), LAN chip/phy to be located near the connector
; T& g; k2 _4 @9 L+ x
6 |9 u) C; O& Z% S
uall traces are routed referencing to GND throughout the length
+ P) j- ]& g2 e! u. f- p5 z# E5 o$ Nuall traces not to cross any GND or power VCC plane split (moat)
: o/ i$ o0 Z" p3 q' M+ r) N- ~ S$ \7 S2 v
u all LAN signal traces not to lie adjacent to any CLK traces
1 w, ?- N4 B& r0 F* O" ]4 b* U! Mucheck their unity of LAN differential pairs trace width and spacing
* o4 Q- {5 c, ~8 J* G4 i) j
udifferential pair termination located on chip side and should be populated
! ]& O/ h* r" j8 n
$ r- F! k- z! S/ S% C9 Y" |5 D
_7 `0 n+ \9 A3 g2 f
% n/ ~# ?% B# d% J7 ~
# g7 I2 m C& [ h4 j1 [# n
( Q7 @' i& k/ X$ p
2 I, o+ W- ]2 M! U, s2 b5 F