|
补丁包更新内容:+ S& p! \; y0 i: {. u5 M, H) x
j6 J8 y: s9 t- LDATE: 02-12-2016 HOTFIX VERSION: 065
5 p# p8 K7 W% g2 S$ j=================================================================================================================================== b9 B: p* E& T( q5 G4 J$ |
CCRID PRODUCT PRODUCTLEVEL2 TITLE
) A' ~* M7 J, O: M, z0 \- L===================================================================================================================================
' ]+ w+ S0 S( N( x! y1511947 ADW DSN_MIGRATION Command line arguments of the 'designmigration' command are not working) V+ C$ V" }( ^3 Z- d
1517388 ALLEGRO_EDITOR SHAPE DRC error reported as PCB Editor fails to read the void for a via
9 t) s9 n% R; o7 s; C* {6 h' U5 X1521661 ALLEGRO_EDITOR PLACEMENT 'place replicate create': Automatically select etch objects connected to symbols, but not to objects outside the circuit
5 W2 ?# m! ^% v) f( W1522831 APD OTHER axlSpreadsheetSetColumnProp with 'AUTO_WIDTH' propName does not autofit the contents.
9 w" F4 y5 a; M- G1524773 SIG_INTEGRITY SIMULATION Running PCB SI Probe and SigXplorer simulations show different number and shapes of waveforms* k# d8 e% t7 m |* B% d
1524875 F2B PACKAGERXL Packaging using csnetlister fails, while manual packaging of individual blocks works fine
1 I/ E, a. Y) |0 v1527785 SIP_LAYOUT WIREBOND SiP Layout stops responding when adding a wire to an existing finger0 F* v+ [6 N+ d" f- w
1528479 ADW LRM LRM crashes when opened on a lower-level block in a hierarchical design$ h4 D f: ~- u& X
1531425 CONCEPT_HDL CORE DE-HDL crashing while trying to add a NetGroup% r) v7 t. d" G+ ^: R& R" A! q+ A
1532722 ALLEGRO_EDITOR NC Backdrill NCDrill files not getting created with PA3100 license. |
|