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本帖最后由 pzt648485640 于 2015-10-18 11:10 编辑 - Q, e0 @9 F" c
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由于17.0作为过度版;固未做太多更新;应坛友需求所发
2 H9 V2 H+ }% JDATE: 09-04-2015 HOTFIX VERSION: 006
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1458272 SIP_LAYOUT ASSY_RULE_CHECK File size increases by factor 4 after ADRC check on a specific customer design# N1 X) ]* U; Q' [
1460178 allegro_EDITOR INTERFACE_DESIGN PCB Editor crashes on deleting vias or nets0 z l4 r* Y0 s: W& S
1461387 SIP_LAYOUT skill axlDBRefreshID(nil) removes ID from assigned variable! ]4 l' S5 w$ Y/ M; @
1461625 SIP_LAYOUT ASSY_RULE_CHECK Core polygon routines are not creating proper polygons; ADRCs reported: "acute angle", "exposed metal to exposed metal"' c/ o: X: w6 _9 t- R. V$ S& O1 @3 L
1464771 SIG_INTEGRITY OTHER Application crashes when extracting Diff Pair topology from Constraint Manager } r0 G2 t5 }' Y/ r; L
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http://pan.baidu.com/s/1gdhBNzl
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直连SPB17.0% t3 v6 s" W; G8 \! ~1 ^
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