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本帖最后由 pzt648485640 于 2015-10-18 11:10 编辑
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由于17.0作为过度版;固未做太多更新;应坛友需求所发% X) O5 R/ B# _! D* E9 W% \1 \
DATE: 09-04-2015 HOTFIX VERSION: 0068 P& w/ b+ G1 X, E' |! h0 @
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8 E4 L! t9 B1 J' i8 v3 n1458272 SIP_LAYOUT ASSY_RULE_CHECK File size increases by factor 4 after ADRC check on a specific customer design
! u/ g1 t' n. c; g& O1460178 allegro_EDITOR INTERFACE_DESIGN PCB Editor crashes on deleting vias or nets5 v7 E5 Q3 s+ C' O
1461387 SIP_LAYOUT skill axlDBRefreshID(nil) removes ID from assigned variable& p% } u# C; G
1461625 SIP_LAYOUT ASSY_RULE_CHECK Core polygon routines are not creating proper polygons; ADRCs reported: "acute angle", "exposed metal to exposed metal"! E- u% [$ T0 M' f/ A
1464771 SIG_INTEGRITY OTHER Application crashes when extracting Diff Pair topology from Constraint Manager
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直连SPB17.00 k; W Z# T/ M8 K$ \5 f
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