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本帖最后由 zgyzgy 于 2015-7-22 23:17 编辑
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) { X) i# U% F/ q) hDATE: 07-16-2015 HOTFIX VERSION: 053! |; O7 Q3 V% |# M! Y' b
===================================================================================================================================1 Z7 Q' T) M0 A% z3 U% {! U
CCRID PRODUCT PRODUCTLEVEL2 TITLE
( Q3 t) F+ r7 T1 H$ \3 }& \% h7 x===================================================================================================================================* u' _5 Z2 ?: d; H' T
1045706 SIP_LAYOUT INTERACTIVE Enhance the Split Via command to be able to split a stacked via into multiple vias
6 P9 h. D( T: r& r ^; C1356381 allegro_EDITOR INTERFACE_DESIGN PCB Editor hangs when adding net to a net group" K( s# V9 ^' P6 X) F0 `
1416250 concept_HDL CORE Save hierarchy from TDO crashes DesignEntryHDL9 q9 ~9 ]5 Y* j) t8 o4 Z% y y
1424166 ALLEGRO_EDITOR SHAPE Dynamic shapes will not fill using the zcopy command
% X$ B5 L& W) B. z1 g1424853 ALLEGRO_EDITOR INTERFACES Error message "Failed to add (LW)POLYLINE" when importing DXF file into PCB Editor
0 Y3 I8 Z5 @2 I6 R1426668 ALLEGRO_EDITOR DRC_CONSTR Require shape DRCs with route keepout
- L1 N+ {5 R% {) Q/ U1427168 F2B DESIGNVARI Variant directives don't get created in CPM while creating variants) [6 S# H- s8 |' {; O- q3 C) i4 S
1427481 PCB_LIBRARIAN IMPORT_TEXT To enhance the import txt file in the PDV8 g3 x. J W8 n3 q# N6 {, v( X
1428336 PCB_LIBRARIAN CORE Symbol Pin Property Attributes not editable with HF49% c, ~. F: n1 h7 |; i: V
1430405 ALLEGRO_EDITOR MANUFACT Running Export - IPC-2581: The exported .xml data does not contain the Probe figures or the probe information
# p) W/ P# I# A1431570 PCB_LIBRARIAN VERIFICATION PDV con2con should read additional properties like NC_PINS from part_table view independant on PACK_TYPE
2 r9 V9 i: F' x n- t; E! K9 Z2 b1431591 ADW LRM LRM should be able to Autofix the parts with $PART_NUMBER even if the SYNC_PROPERTIES has a value of PART_NUMBER- F9 `& N* }7 z+ I9 ?( b/ k
1431875 APD EDIT_ETCH When trying to multi-route a group of nets, APD crashes with the .SAV error.
1 n& r$ h- D' `( n1434375 ALLEGRO_EDITOR INTERFACES Running Export - IPC-2581: The last or largest pin in a series of pins listed in pinOneCfg.txt is selected d( \& ?) V* Y' [- Z' d
1434975 ALLEGRO_EDITOR MANUFACT Running Testprep > Manual causes Allegro PCB Editor to crash
- R. n6 \. ^$ @; ^+ R& U( A3 E1435685 F2B PACKAGERXL Export Physical indicates 36 errors are found during backannotation, but the backannotate.log file contains no errors
. l' o7 }. `& W* _1436206 SIP_LAYOUT ASSY_RULE_CHECK Ignore shapes autogenerated by the crosshatch void fill routine in the acute angle shape boundary ADRC check
y+ W' ]$ t# Z7 v7 Q1 I1436699 CONCEPT_HDL INTERFACE_DESIGN model assignment not working if signal_model exists within a block4 c$ b# u$ {* S( N, }- C! h
1436989 ALLEGRO_EDITOR OTHER PCB Editor crashes after pouring copper planes
# j* z6 U6 t' C7 k1437150 APD DIE_GENERATOR Creating a die using the Compose from Geometry command gives error, "E-(SPMHA1-70): Pin is outside of the extents"
, U' b5 q5 d+ T4 P# R1437287 CONCEPT_HDL CHECKPLUS CheckPlus Segmentation Fault in LINUX: E6 \; E# |6 }* O
1437560 ALLEGRO_EDITOR OTHER APD crashes when running gloss with dielectric generation for the given testcase.8 Z5 U. n. s* C( Q5 r$ \
1437565 F2B DESIGNVARI Variant Hier BOM report puts Block DNI in wrong report section
) R$ z+ @3 [. `0 b; b" h/ ~1437725 APD EDIT_ETCH Route > Slide exhibits erratic behavior on differential pairs( j3 R# m$ W" ]) I1 V6 V
1437748 SIP_LAYOUT INTERACTIVE Allegro Editor and APD have the command opengl report defined in the menu. Please add this to the SIP menu structure7 M7 Y6 O6 M; @+ A# ^) k
1438933 CONCEPT_HDL CONSTRAINT_MGR Model Defined Differential Objects are named differently
0 ~9 C' _% G% Q1439104 ASI_SI SPDIF SPDIF popup window" I# [. ]! _2 N4 A9 r
1439574 CONCEPT_HDL CORE How do you rotate groups of objects in windows mode?
2 x3 U# S( p* t, v {9 O1 e1440393 ALLEGRO_EDITOR INTERFACES Ability to extract STEP properties from DRA requested4 D7 k$ }, `: U R; n
1440589 ALLEGRO_EDITOR DATABASE Edit - Change crashes the database with errors." B& x4 ?" ~ m9 Q' k& q( R" v! _0 w3 c
1441665 CONCEPT_HDL CORE Property not annotated visible as set in ppt_optionset.dat" D$ {1 f# }5 t/ C4 v
1441672 SIP_LAYOUT ASSY_RULE_CHECK ADRC Hangs and does not close3 Z, p, e% g, O( \
1441724 SIP_LAYOUT PLATING_BAR Need to be able to set the Plating Bar Width.
Z, G4 u, ^9 Q9 T/ ?$ V: |1442144 ALLEGRO_EDITOR SCRIPTS PCB Editor crashes when replaying script5 V" ]+ E9 x: Q& \
1442798 ALLEGRO_EDITOR DATABASE PCB Editor crashes when running dbdoctor
7 e& N" d4 v' g% ^. k" E# H9 T1443693 ALLEGRO_EDITOR SCRIPTS Change Accelerator keys for new orcad shape Menu
9 { N; i/ Y0 ~4 K1443738 F2B DESIGNVARI Automatically exclude Nets or Ground Symbols from the Group while adding to Variant1 @/ Z8 Q0 F, A+ d5 z3 ~& j% V
1444066 CONCEPT_HDL CORE Replace parts in variant view crash DEHDL if cpm library list contains nonexisting libraries." X7 P. z. b" U: W
1444076 CONCEPT_HDL CORE Replacing parts in variants backannotates ALL injected properties in variant view& X0 o2 Y$ N- a; R% n8 V& V
1444676 ALLEGRO_EDITOR SCRIPTS difference in PCB Editor and OrCAD PCB Editor menus in Hotfix 513 ^. g# @: }8 C9 }, D3 d
, ~. H, ~+ `' Y8 Q* N. S4 I! w下载链接:http://pan.baidu.com/s/1pJoUvtp
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