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本帖最后由 zgyzgy 于 2015-3-15 14:42 编辑
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- h9 _& Q& ~4 a( o( hDATE: 03-13-2015 HOTFIX VERSION: 045& w( [, D: S w# E( I
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6 I9 |6 i' Y4 R9 X. R* s1308671 concept_HDL PDF Pivotal symbol on Hierarchical Split Symbol bodies needs to be hidden in the generated PDF
2 p' V z& d% C1 m$ j9 q. P/ {1349899 Pspice NETLISTER PSpice: Getting different simulation results in versions 16.5 and 16.6
; R% g( P4 g8 }' x- Y3 T: m- }1355271 FSP DE-HDL_SCHEMATIC FSP generating incorrect connectivity information in HDL. u" M4 z0 f1 R: y9 ~. X, q2 {
1370402 ADW TDA TDO does not use the specified name for creating the local work area.8 F; ]/ p5 e* @) Q- u
1371281 CONCEPT_HDL CONSTRAINT_MGR It takes 10 minutes to launch Constraint Manager: q. A/ h% a2 H* O# p/ O2 }
1372480 CONCEPT_HDL CORE How do I get ASA to recognize changes made to a schematic block?
2 {% L9 L- c5 _" x0 c# I9 T7 J1372939 CONCEPT_HDL CORE Save Hierarchy and Save All do not resolve the duplicate refdes issue in a SIZEd part0 N+ {! a! s( }; o' o& g- C
1375265 ASI_SI OTHER allegro Sigrity SI to XtractIM translation failed with a workspace file opening error2 M8 a/ z" R# g( S
1376225 SIP_LAYOUT DIE_ABSTRACT_IF 'Refresh co-design die' operation fails with "incorrect number of ETCH subclasses defined" message; l+ @( N! M9 Y V$ `' q0 f9 W/ m
1376644 ALLEGRO_EDITOR mentor Command line mbs2brd still needs SI licenses! z/ F* T3 a1 p% z& R4 M
1376846 SIP_LAYOUT IC_IO_EDITING Running the Show IC Details command generates a drawing/symbol extents error, then SiP crashes
7 p1 l4 F% _8 m! e) _1 C& Z1377297 ALLEGRO_EDITOR EDIT_ETCH PCB Editor crashes when using the Remove Tuning command, m3 N- N) q Y; C
1377587 CONCEPT_HDL MARKERS The marker file cannot be loaded using the console command "_! markers load <filename.mkr>".
( k$ B- h: I; V% [1377711 TRANSLATOR SPDLINKS Unable to open an MCM file in XtractIM from APD# X1 C3 w3 N5 _; }
1377962 CONCEPT_HDL CORE If an instantiated part is removed from the library, DE-HDL hangs while reading the .xcon file! {+ P- p% v' f% ^8 ~
1378032 ALLEGRO_EDITOR REPORTS Report command and batch mode give different Waived DRC Report results in PCB Editor6 j1 N# F! n, S2 k4 q# @
1379797 F2B PACKAGERXL Connections are missing in the generated netlist
' y6 q% n$ z( o' d2 R5 a+ e4 \- E% f稍后附上链接。。。。。。
2 K0 N! x3 F0 N) l* g' ]下载链接:' ~0 b, D+ m7 G( ]7 N7 C
http://pan.baidu.com/s/1mgsrKfQ
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