|
|
推荐
楼主 |
发表于 2014-11-16 10:34
|
只看该作者
/ ~9 R! d3 M2 J% h% l
DATE: 11-14-2014 HOTFIX VERSION: 0399 h; y, |% Q! q; O; g, ~7 G
===================================================================================================================================/ I9 S/ }3 U' R6 d& w* l( L
CCRID PRODUCT PRODUCTLEVEL2 TITLE
1 w4 D# t9 ^5 G===================================================================================================================================
7 y. K, n" E3 ^1 ?1 W- g/ v- m1213239 FLOWS PROJMGR SPI_ERROR: Missing closing quote at line 41 in""8 K J6 t5 I5 w* X* W5 [* e
1301262 SPIF OTHER When creating .dsn file for designs containing netclasses with net groups, PCB Editor stops responding.
: L- b/ d3 y" ~. Z6 n! \1301469 CONCEPT_HDL CORE DE-HDL Import Design - Need a directive to enable the "Retain Hard Packaging Information" option by default
9 O, s2 w. E8 I; t$ ]" A4 A4 n* X* L5 w1309535 SYSTEMSI ENG_PBA PA5700: Cannot print, save, or post process SI analysis reports6 X- Z* u' y+ j' s9 U, S% Y
1317019 SIG_INTEGRITY LIBRARY Buffer model for pins not changing correctly when multiple DML files are present in working directory.8 L1 T; g8 U& i$ b
1318452 ALLEGRO_EDITOR DATABASE Derive Connectivity does not update connections; DRC errors thrown8 S, A/ w M- Z- c' K, {5 A3 D. I
1318610 CONCEPT_HDL CORE DE-HDL does not re-validate/re-read DML files on disk upon launching Constraint Manager
9 _# P/ F+ I# w# t1320997 CAPTURE SCHEMATIC_EDITOR Copy paste of multiple images are stacked in same place.
" C1 Y2 x& O. o8 O1321377 FSP GUI FSP crashes while performing copy-paste operations between different arrays in the Rule text editor6 A; R7 @- C L6 z) g
1321513 ALLEGRO_EDITOR SYMBOL Preview not available for DRA
( d1 h2 l6 b6 B# _* f1324479 ALLEGRO_EDITOR OTHER Option specified in license_packages_allegro.txt file but missing in license server causes Segmentation fault on LINUX* H4 _0 F: Y& h# ]! J( V
1327962 FSP MODEL_EDITOR Need ability to select multiple pins in the Preview area of Rule Editor
3 _* r0 u, q4 }* g& y- u: q1 u4 G7 ?1328633 CONCEPT_HDL CORE On running Save All, changes were partially saved before DE-HDL crashed.
9 L; p& H6 W- R1328921 ALLEGRO_EDITOR DATABASE Running Derive Connectivity followed by Database Check throws SPMHUT-17 error
( ^) x5 y- Z# e$ d1330029 CONCEPT_HDL CORE PIN_TYPE and PINUSE attributes not updated consistently in DE-HDL design: `: q! z" ^4 V) g/ a6 L( i- G% k
1330580 SIP_LAYOUT SYMB_EDIT_APPMOD When adding a pin using the Symbol Editor the Pin Name is being changed if duplicated
5 C1 _- B' Y4 ?9 A1331028 CONCEPT_HDL CHECKPLUS Rules Checker fails on DE-HDL component.. d/ y! @6 |3 t- A, q
1331051 ALLEGRO_EDITOR INTERFACES Soldermask layer is mapped to both Soldermask solderPaste and Miscellaneous Image Layers columns using IPC-2581B: w6 v) h& h. B; y: Z" I
1333127 CONCEPT_HDL CORE Sheet number in the new window is only the block-level number and not the design-level number
4 h0 {, D4 ^0 g' f. H' d' L* B1333591 SIP_LAYOUT SKILL Difference in behavior for padstack replace using axlPadstackReplace and command Replace Padstack
, u6 V1 M i7 D$ j% C1333896 ASI_SI OTHER signoise -f and -k options don't work for net names with consecutive underscores.; A: V3 Q% @: F& S
1333982 ALLEGRO_EDITOR ARTWORK ARTWORK: Coordinates of the hole get shifted by the "Draw holes only" option.
8 {* F. H6 c7 j$ w- G- ]1334302 CONSTRAINT_MGR SCHEM_FTB Import Logic - Import changes only or Overwrite current constraints fails to update signal models.7 K1 X0 O- M. {9 X. `) }+ t
1335276 CONCEPT_HDL OTHER On selecting objects near the schematic page border, the border is also selected" ~7 R+ z0 G! M f
1336322 CONCEPT_HDL CORE DE-HDL does not open with maximized window.( o) o! ]9 O7 l A' [1 p
1336783 PCB_LIBRARIAN IMPORT_EXPORT con2cap fails to export the part to OrCAD Capture format |
|
/1 
发表于 2014-11-16 10:30
收藏
淘帖
支持！
反对！
发表于 2014-11-16 23:52
