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zxli36 发表于 2012-12-29 09:04 ![]()
+ a$ Q4 F, x. b$ T+ U, A: E, Y. z能不能把你Package时的信息发上来大家看看。 , G2 T+ G& _5 L8 m6 N/ a8 I, U
Package时的信息如下,总共有二十几个问题,几乎所有器件都有问题,这个问题困扰我很长时间了,麻烦您帮我看看,非常感谢1 U3 L$ n! W+ W7 U5 B
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, {! Q# i+ @+ k2 AStarted C:\MentorGraphics\7.9.3EE\SDD_HOME\wv\win32\bin\packagerui.exe F:\demo_dx\demo_dx.prj /d Board1 /nobrowse /config "C:\MentorGraphics"% K: B. l( r) U. Y; J3 [
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Packager Version: 020806.00
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Commandline is: "C:\MentorGraphics\7.9.3EE\SDD_HOME\wg\win32\bin\package.exe -jF:\demo_dx\demo_dx.prj -nBoard1 -Add"- S0 l- _. P* K- H
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The Common Database is at "F:\demo_dx\database".6 F* p2 M! I3 I! }* B. u/ I
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The Root of this design is "Deme_Root_1".
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# P/ X1 _. J; F) EThe Front End Snapshot of this design is "DxD".
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`, R& m8 i& I" LThe PCB Design Path of this design is at "F:\demo_dx\PCB\Board1.pcb".
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% }9 ?7 D9 x; J$ X% VThe Central Library is at "F:\Central_Library_for_DxD-Exp\Central_Library_for_DxD-Exp.lmc".; G" N; C$ |' T n! \+ H
q! u- O _& X2 R4 V: eUnable to determine the Disable Repackage status.( ]1 ^! H) }6 t$ j% |
!Repackaging will be allowed!
: [3 f; q8 [& u1 }
7 B) z7 z5 D4 k" nThe PDBs listed in the project file will be searched to satisfy the parts! I2 C6 J3 \5 `! I2 Y
requirements of the iCDB only for parts not already found in the1 L; J0 M1 Y, Y
Target PDB.. f6 \9 V6 P% h G3 m; [( j$ I
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The AllowAlphaRefDes status indicates that reference+ n0 u* i; z- @ p
designators containing all alpha characters should be deleted
, N/ N: C) ^3 S3 sand the relevant symbols repackaged.. b9 m& ] [# i" F, h! D
" E5 T% F" B2 i9 }& t" y; VThe cross mapping of symbol pin names to Part Number pin/ O- S2 V6 C/ w' ^" E2 |
numbers will be checked for packaged symbols and mapped correctly" E' ~) M- p `: s% _
for unpackaged symbols.
! Z/ a/ u1 d- p, h$ p0 i3 E [/ _4 |5 i
Properties that have been checked off in the Property Definition Editor
+ b' h& K) W1 w+ m7 yfound at Library Manager/Common Properties will be checked for value
7 q- ~% i/ c @: wdifferences between the PartsDB and the non-null properties on symbols.
2 t. u( f/ K5 a7 A0 r0 N& u& o3 gThose properties checked off (other than Part Number) v9 m& X ?1 E- X6 q
will not be transferred from the PartsDB to symbols.
" D, q2 }" {) V2 Y5 r, [- S& L) C4 pThe following properties were checked off in the Property Definition Editor:8 e7 I5 D- l5 Q! ~! U; g
"EPFIXEDWIDTH"
: g/ c* S l; Q3 ^: b! K1 o+ @"EPFIXEDLENGTH" {& f5 P' y! _- M) }
"Term"
9 b( k# b6 c0 Q3 U/ }8 S% W8 T2 Z"SIM_MODEL"7 @' @/ s0 W/ p
"SIM_MODEL_FILE"+ c/ w& r3 ]/ ]! }3 @8 Y* y: w
"Array Component"
6 F% @8 B) I: ?! @"ICX_PART_MODEL"* D0 ~: Q' o3 s7 O
"Use Verilog"* x& p" @3 t& V1 n: A
"Order"
* J x- ` h* G3 @& T"Parametric"& h: M9 z' \3 K, \% r( F
"Value2"+ C2 J/ y8 J% a* U4 A. N0 G
"Tech"0 B/ s7 {3 ?" r6 [
"IBIS"
/ z8 ?# v* b2 { M, I9 S"Part Label"
( k: u! L1 t5 {* @, Y"VHDL Model"
c C L% e$ Q! ["Verilog Model"# G- U1 B0 u& t" @& X
"Cost". h$ e6 X( E3 v1 Y& i9 `# A$ v
"Tolerance"& O& |& e! g; U
"Part Number"
- h5 [& _/ @ T. O1 v$ _9 q"Value"0 @6 s9 M( c" H. D* V* C4 @/ I( j) R
"Part Name"- @" @- G+ X7 D% H" \" R; B# m
# `7 q; j y- w& w$ M
# M6 z1 u/ M& |Testing of Packaging is being terminated with 22 errors and 1 warnings.
$ p& O: s" O1 C' [Design has NOT been packaged.
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- v8 _& U& V% e! u% w, |/ GWriting to Log File: Integration\PartPkg.log
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( C+ O( x+ Q/ O# Y& TThere have been 22 errors and 1 warnings.* I/ @0 q6 ~5 Y1 a6 X
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///////////////////////////////////////////////////////////
F4 N" s4 J- G9 ^///////////////////////////////////////////////////////////
L- b: `5 f2 c+ g, u' ]$ ?: Y///// The Log File will now be copied to this window. /////3 @* Z! z7 y! {' p
///// Therefore the data above will also appear below /////8 s; r |4 B: C: V1 I5 c4 g0 h
///// with more specific error and warning messages. /////1 }. q$ C4 ]3 _+ B s
///////////////////////////////////////////////////////////; X( f3 O }* r8 A+ A2 |" B7 G5 i
///////////////////////////////////////////////////////////' c+ k9 C" W+ J4 V# B# X/ `
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3 ?' X0 C0 n9 b# n: x' DPackager+ P8 {& A" y6 B" }# V% L
--------
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09:27 AM Saturday, December 29, 20127 ]; e {' o* s# f+ [
Job Name: F:\demo_dx\demo_dx.prj* O/ O" d) x7 L5 L# y3 x' h/ D! w
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4 S! ~% s4 q" QPackager Version: 020806.00
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Commandline is: "C:\MentorGraphics\7.9.3EE\SDD_HOME\wg\win32\bin\package.exe -jF:\demo_dx\demo_dx.prj -nBoard1 -Add"' ?9 r+ p/ G6 \: A3 N: P/ @4 P4 A7 i
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The Common Database is at "F:\demo_dx\database".
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The Root of this design is "Deme_Root_1".2 V/ l3 V8 ]4 H$ N( l. L
4 y9 b4 P2 m+ c6 C7 vThe Front End Snapshot of this design is "DxD".
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The PCB Design Path of this design is at "F:\demo_dx\PCB\Board1.pcb".0 v) n% t$ L8 j8 x. g
3 ?! r. F$ t1 K0 I9 N% uThe Central Library is at "F:\Central_Library_for_DxD-Exp\Central_Library_for_DxD-Exp.lmc".; r2 `" f3 V \% J) F/ F; U
1 n# J& V, ?; _Unable to determine the Disable Repackage status.
/ p% P' Z4 H, z3 Q6 y$ \!Repackaging will be allowed!9 p( h% G+ G5 B0 P
4 S1 G) {3 V6 B
The PDBs listed in the project file will be searched to satisfy the parts
# C! e/ [' l+ e) A9 k( t- prequirements of the iCDB only for parts not already found in the* M+ ~8 Y3 W- w
Target PDB.
$ ^2 W( c% E" O) C7 ~$ J) [9 d' Z1 o+ i3 M
The AllowAlphaRefDes status indicates that reference
0 n8 t. y4 Y9 K7 cdesignators containing all alpha characters should be deleted, W0 a3 q' ^( R* R2 ]6 E
and the relevant symbols repackaged.9 c6 q" J. @9 R! V* K# _' C9 {; l
1 O2 q! A7 e2 I6 E: l: U3 _
The cross mapping of symbol pin names to Part Number pin% U* O# q6 O! w& M% W- t9 u n
numbers will be checked for packaged symbols and mapped correctly
' j1 P7 v0 F/ F+ x1 {for unpackaged symbols.8 V4 U% ]$ g( ?
. ?) Z9 y9 t6 s# nProperties that have been checked off in the Property Definition Editor
% n3 T4 l: r, c5 t2 r2 D. }5 kfound at Library Manager/Common Properties will be checked for value+ L3 Q5 P7 Q: @' n$ s3 ~
differences between the PartsDB and the non-null properties on symbols. B) r# Q. }5 _+ l) n$ [, Y2 A
Those properties checked off (other than Part Number)$ v' V% C# d: E( x- ~4 {
will not be transferred from the PartsDB to symbols.
5 r" i Z' q5 s* G+ x/ s* C" HThe following properties were checked off in the Property Definition Editor:5 ?6 [ a, A/ ~, C4 i. B- ]
"EPFIXEDWIDTH"4 q ~! F. a6 N4 }5 f# ~
"EPFIXEDLENGTH"
- Q0 X1 k+ T; N- o% P5 b- E"Term"4 v) N( v; a; ~6 i6 {
"SIM_MODEL"
5 |/ I5 s" H4 X9 m4 j; ]4 N"SIM_MODEL_FILE"6 S: L/ o4 w2 h. y; E& r. u( G
"Array Component"
" b- d3 m8 ~) V* P"ICX_PART_MODEL"
( N" r" V! p, z& S* S4 b"Use Verilog"4 h* H1 h3 z, g' R7 T5 b
"Order"7 D5 p c. n! m8 _5 o5 L
"Parametric"8 o; p: S- D9 ?. R3 R4 |3 t) p7 D
"Value2"
2 C$ C8 F7 O8 e! r" {! l"Tech"8 g5 ^; y4 f+ e# p }: u3 D! p
"IBIS"
0 x% k: V, C8 ]" M, d"Part Label" z6 a% h% b) F3 a, G8 h
"VHDL Model"
0 a% v" V$ e$ R, g& G2 @, j"Verilog Model"
4 C0 m7 B! N5 \( _( }" }2 P"Cost"3 ~4 `. C5 s/ T+ T
"Tolerance"- D2 c- D- r# ? a" F) ]
"Part Number"
1 M/ O8 A @ D5 d"Value"1 V0 a# W' x; k4 p' m7 i) Z' y1 ^) p
"Part Name"
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4 x" N$ \7 l& G4 R zChecking for errors in the ICDB...4 b$ u2 g) K$ a3 c& a" [
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No errors found. Proceeding with packaging...
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4 R6 R" B% j) K6 @, SCommon Data Base has been read
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4 r1 O) @' M1 }Target PDB Name: Integration\LocalPartsDB.pdb
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7 a3 s" ?/ }9 R! YWARNING: There are no PartsDB partitions from which to extract parts.
( @; s' b1 B' RProceeding using the data in the local PartsDB "Integration\LocalPartsDB.pdb".* e, a) ]( a$ P" H6 P
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Number of Part Numbers: 219 ^6 Q, O O1 k9 G2 x
Part Numb: BNC_1 -> Vend Part:
* j; O' \7 v1 H2 M/ r8 h7 l R) |Part Numb: CON_EDG_64 -> Vend Part:
0 K" N q7 G! m( dPart Numb: C_P0.01pF -> Vend Part: " ]: h" ?5 |( U4 r
Part Numb: C_P3.3uF -> Vend Part: 9 u2 T/ h8 H# ~( H
Part Numb: C_P47pF -> Vend Part:
& A4 o) B$ G) Q; nPart Numb: C_0.1uF -> Vend Part: + g+ u6 S! ]9 ?
Part Numb: DG419AK -> Vend Part: & ~. l- Y" R3 F# l/ W2 h- l8 [2 V' ]
Part Numb: EPC1064 -> Vend Part:
$ b/ q5 Z }# ]& v8 v$ XPart Numb: EPF8282A -> Vend Part:
' e7 g2 o5 ~- r4 n( c1 x0 B. ?Part Numb: FCT16245 -> Vend Part:
# O1 m- L9 S- T7 iPart Numb: LED -> Vend Part:
7 p8 k! t- D+ B/ ~Part Numb: L_50uH -> Vend Part: ) I; ^% F3 t: P( \$ W
Part Numb: R_2K -> Vend Part: ' S$ s: _$ f3 x; S
Part Numb: R_10K -> Vend Part: : m# y% Z0 s* g
Part Numb: R_100 -> Vend Part:
( S$ j a. m' z1 h" f: {. OPart Numb: R_220 -> Vend Part: ; R# H% H. R6 o' A1 |
Part Numb: R_510 -> Vend Part:
! ?2 O c9 Z# Z8 ^' B, GPart Numb: TC55B4257 -> Vend Part: . D: P9 |, v) I; k, g5 k* j
Part Numb: TLC5602A -> Vend Part: 1 a# y! I$ d- _, o* y1 K8 z
Part Numb: 20L10 -> Vend Part:
( H7 i+ v6 ^% a2 v4 k9 H% mPart Numb: 74ACT574 -> Vend Part: 3 N! j, }5 f3 C# F1 g( h# o; _
# ]0 Q% f/ P: N( P8 CNumber of Part Names: 1
( x+ T) F2 Y8 O7 RPart Name: TLE2037A -> Part Number: 9 N' G7 Z- Q3 V; h t; ^
" O. g9 v8 d6 l2 n" q) k" ONumber of Part Labels: 00 F8 o" i' @6 a; i
4 d [' E7 b4 c* G' Z6 ?- e
9 t* W K9 s8 [3 Y, L
Checking for value differences between non-null symbol properties and PartsDB properties,
. U. h0 b! @4 b* m" k! p7 bbut only for those properties checked off in the Property Definition Editor
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Checking the validity of the packaging of prepackaged schematic
* Y" q% F h0 _, y) y2 _5 [3 r: Msymbols. Only the first error in symbols having the same' ]" n# X0 N4 M5 g% y8 S2 ]' c; s0 {
Reference Designator will be reported.; J8 r5 e* V5 U9 n8 C7 Y
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ERROR: There is no Part Number: CON_EDG_64 in the Parts0 Z. I u) o# n" [/ \4 \( m
DataBase for symbols with Part Name: CON_EDG_64 and Part Label: (null).
! a1 n5 k; q$ e; d ~[Please add the Part Number to the PDB either directly
`9 c3 ?) G! n" Z& j& L7 V* |" Aor by having the project file point to a PDB that contains it.], X+ i) q: M y8 W( A9 q" C
The relevant symbols are:% C; X4 G- Y& U7 _4 W/ m$ N
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Block Deme_Root_1, Page 1, Symbol $1I41
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1 \+ c" C# B) R$ r9 tERROR: There is no Part Number: FCT16245 in the Parts9 x, T h' z) j" _/ f
DataBase for symbols with Part Name: FCT16245 and Part Label: FCT16245.
I. y; e2 t1 W6 g' H[Please add the Part Number to the PDB either directly
! P3 @: Q1 e; t% K6 F8 Aor by having the project file point to a PDB that contains it.] R9 ^ h" e9 a
The relevant symbols are:
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F+ }7 _) k+ i7 Y8 q, u Block Deme_Root_1, Page 1, Symbol $1I1277 9 J9 {8 m( h7 W5 T' ]
Block Deme_Root_1, Page 1, Symbol $1I1424
$ a% Z0 f3 r- b; f Block Deme_Root_1, Page 1, Symbol $1I1395
, G5 X! F3 W' ?4 J& o Block Deme_Root_1, Page 1, Symbol $1I1366
& q) e- r0 f8 I8 |% U% c8 F" _ Block Deme_Root_1, Page 1, Symbol $1I1337
: B5 _) r. d9 f8 o+ C Block Deme_Root_1, Page 1, Symbol $1I1308 |
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