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[仿真讨论] 国内第一块公开展示的25G高速背板!

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31#
发表于 2012-2-21 16:57 | 只看该作者
好帖

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32#
发表于 2012-2-22 08:52 | 只看该作者
真是高速呀,学习了。

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33#
发表于 2012-2-22 10:40 | 只看该作者
:lol估计这辈子我也画不出25G板子

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34#
发表于 2012-2-22 13:39 | 只看该作者
公布点各种等长绕线的结果啊,这个经常用到

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35#
发表于 2012-2-22 14:30 | 只看该作者
挑战极限 发表于 2012-2-22 10:40 % n7 P6 w- d4 J
:lol估计这辈子我也画不出25G板子
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不一定,曾几何时,100M以太网也是王榭堂前燕。在10年前,如果你设计过1.25G的通道,那绝对是牛人。

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36#
发表于 2012-2-23 08:43 | 只看该作者
各种等长绕线测的是什么东西?测试结果与仿真能否吻合?

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37#
发表于 2012-2-23 09:34 | 只看该作者
科技在进步啊,我还有很多东西要学习啊。

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38#
发表于 2012-2-23 10:55 | 只看该作者
本帖最后由 stupid 于 2012-2-23 10:59 编辑 - K+ a! ^: h' o# o% d
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Avago Technologies and Texas Instruments are among the companies at DesignCon this week with new components to drive boards and cables to higher data rates over longer distances for less power and cost. They and their competitors are gearing up to enable a next-generation of systems using 100 Gbit/s Ethernet and 10+ Gbit/s interfaces.
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Avago is announcing a 25 Gbit/s serdes that can support transmissions across more than a meter of a backplane and up to five meters of copper cables. It will also demonstrate a 32 Gbit/s chip, likely aimed at next-generation Fibre Channel storage networks.
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, O3 }7 ^3 N0 y, tCEI-25G LR 不过才27“,Avago你也太牛啦。. X8 u8 H; p* n6 s: N

3 ?2 W' _. N' u7 l( t" uTexas Instruments is rolling out a line of ten 12.5 Gbit/s signal conditioners that drive signals across copper cables over distances of up to 20 meters. The components aim to replace larger, more expensive and power hungry physical layer chips.
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( X4 g6 l$ [9 L$ O; v2 i. Z, i/ `3 H2 N) u密度够高,但能否替代Phy 还要观察
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Both companies are using the latest process technologies and signal integrity techniques to hit new milestones. They join an industry focused on responding to the need to carry ever more data over networks while keeping a lid on power and cost.
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Many of the chip, board and cable companies at DesignCon aim to enable 100G Ethernet products that use four lanes running at 25 Gbits/s. The products set to ship late this year will provide reductions in cost, size and power compared to today’s 100GE systems that use ten 10 Gbit/s lanes.
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( ]4 V2 _0 s3 @- W去年的DesignCon,就avago展出30Gbps SerDes,NS展出28Gbps retimer,今年好热闹。4 ]5 _8 b  w! V* c  m) `

) w/ m6 x' d* x7 e* a“The adoption of 100GE is happening much quicker than we anticipated with the rise of things like LTE networks and iPads,” said Sanjay Gajendra, a senior product manager at Texas Instruments. “We still believe mass production [of the next-gen Ethernet products] will be at the end of the year, but a few vendors will demo prototypes earlier,” he said.0 P! t2 o7 f+ x) W* [7 T+ Z  F
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“The bandwidth needs of OEMs are going up incredibly every year,” said Frank Ostojic, general manager of Avago’s ASIC group. “25G will require a system level approach and coordinated work in a close partnership among the board, chip and package suppliers--it will be a kind of chip-set approach,” he said.
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6 E* y* L( }( {' z* OMultiple networking and telecom companies are already designing ASICs that will tape out over the next several months with Avago’s long-reach 25G serdes. The chips comply with the latest 25G standards from the Optical Internetworking Forum and hit new lows in latency and power consumption, numbers that Avago is keeping under wraps.# W( j! k, k+ D

$ g4 A( V; R: f* p$ S. @3 g“You need 28 nm process technology to make this work,” said Ostojic.* F+ \7 f- z3 G; ^( m
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Avago’s 25G serdes, which will eventually appear in the company’s standard products, employ proprietary techniques in clocking and decision equalization feedback (DFE). Avago also is expected to demo a 100G kit that can be used to optimize designs with any vendor’s serdes including competitors such as IBM, LSI and STMicroelectronics.8 B% u; Y7 {9 z
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Avago,你也太狂啦。5 A. \& Q+ x: x9 T# D# t

8 C, Z) U9 v9 u9 L# x) TTI’s signal conditioning group, formerly part of National Semiconductor, is using DesignCon to launch a line of 12.5G repeaters and retimers, saving news of its planned 25G parts for later in the year.
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3 T$ A8 t4 z3 }2 GThe repeater chips consume as little as 65 milliwatts driving a 10G channel; the retimers consume about 150 milliwatts. They are meant to serve board, copper or optical cable applications across a range of protocols including Ethernet, Fibre Channel and Infiniband./ U# G8 H7 d/ l

0 U" v7 q8 _/ B- YTI的repeater功耗够低,使用bipolar工艺。8 d2 ^6 }2 D/ T: t

2 f! {, `; Z  J, t' Y1 g, xTI uses a proprietary BiCMOS SiGe process to hit the low power figures. Algorithms on the chips measure signals and apply equalization as needed on the fly.
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, k' f+ S) B7 J# {& j' c, BThe company hopes its the signal conditioners will replace external physical-layer chips given ASICs are increasingly building in the serdes and protocol processing functions once handled by the PHYs.  OEMs can save up to 90 percent of the power and 75 percent of the board space used by the external PHYs by taking such an approach, said TI’s Gajendra.. z" `- Z6 N: s8 O$ c' s
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The PHY makers such as Broadcom and Marvell are likely to offer their own twists on integrated chips and different value propositions. Gajendra said they are still likely to drive greater power consumption. / R& }) |, N  e3 a6 y, W5 u
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TI must also compete with other repeater and retimer vendors such as Gennum. Both companies gave demos last year at DesignCon of 25G products in the works.0 O1 [9 ]" p" x" k! R

/ T  q3 s& P% J8 k- C2 Q4 x9 kEngineers are aiming for 25G products supporting 30dB loss, said Gajendra. Products demonstrated to date hit about 25 dB, he said.

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39#
发表于 2012-2-23 13:28 | 只看该作者
很好 见识到了

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40#
发表于 2012-2-23 17:08 | 只看该作者
当信号速率越来越高的时候,仿真与测试差别越来越大,制造带来的很多不确定因素影响凸显,粗糙度的参数如何获取?使用材料的多点debye模型在多高速率下比较准确?微带线覆盖绿油参数如何精确控制,如果是镀镍金,厚度比例又是如何?镀层的材料参数如何获取。塞孔材料及深度、表面处理方式有何影响?测试设备如何准确对25G速率进行测试,测试会引入哪些误差。无数个问号待解决??????

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那就让问题来得更猛烈些吧!  发表于 2012-2-23 17:33
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41#
发表于 2012-2-24 08:09 | 只看该作者
提示: 作者被禁止或删除 内容自动屏蔽

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42#
发表于 2012-2-24 08:43 | 只看该作者
{:soso_e121:}

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43#
发表于 2012-2-24 09:29 | 只看该作者

" E& R/ L5 p0 Q& `+ u3 I( C: |2 m现在要做个仿真有关的测试板,可以借鉴一下快捷的

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44#
发表于 2012-2-24 13:19 | 只看该作者
楼主能有图片上的测试结果么,发来给兄弟们开开眼啊

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45#
发表于 2012-2-24 13:30 | 只看该作者
期待...
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