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+ ?* P( {, [# X6 q' nChecking Schematic: FPGA
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4 x5 e& K& f8 P& _ h$ CChecking Electrical Rules
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% K! T; G% K) Q4 h2 x3 |. BWARNING [DRC0004] Possible pin type conflict U1,IO_VB6N1_V21 Bidirectional Connected to Output Port: FPGA, PAGE-A1 DR FPGA END (4.90, 2.20)
4 @ i" ~* S& [: _% wWARNING [DRC0004] Possible pin type conflict U1,IO_VB7N0_AA19 Bidirectional Connected to Output Port: FPGA, PAGE-A1 DR FPGA END (5.00, 4.80)
8 A1 {# p, s% YWARNING [DRC0004] Possible pin type conflictWARNING [DRC0004] Possible pin type conflict U1,IO_VB7N0_W15 Bidirectional Connected to Output Port: FPGA, PAGE-A1 DR FPGA END (2.50, 5.30) U1,IO_VB7N0_Y14 Bidirectional Connected to Output Port: FPGA, PAGE-A1:DDR FPGA END (2.50, 5.50) 3 W1 g, z( x0 b
WARNING [DRC0004] Possible pin type conflict U1,IO_VB6N1_V20 Bidirectional Connected to Output Port: FPGA, PAGE-A1:DDR FPGA END (4.90, 2.10)
% ~6 v& m+ y1 b3 MWARNING [DRC0004] Possible pin type conflict U1,IO_VB6N1_V22 Bidirectional Connected to Output Port: FPGA, PAGE-A1:DDR FPGA END (4.90, 2.30)
" n% w1 O* s( I& G" l; {& YWARNING [DRC0004] Possible pin type conflict U1,IO_VB6N1_W22 Bidirectional Connected to Output Port: FPGA, PAGE-A1:DDR FPGA END (4.90, 2.70)
, i' i( k9 P5 Z) p; g- dWARNING [DRC0004] Possible pin type conflict U1,IO_VB7N0_W16 Bidirectional Connected to Output Port: FPGA, PAGE-A1:DDR FPGA END (2.50, 5.40)
. D9 V, I: J* h0 D. a* n4 DWARNING [DRC0004] Possible pin type conflict U1,IO_VB7N0_AB18 Bidirectional Connected to Output Port: FPGA, PAGE-A1:DDR FPGA END (5.00, 5.60) & D& ~$ ^) D x- {0 B% _
WARNING [DRC0004] Possible pin type conflict U1,IO_VB7N0_Y17 Bidirectional Connected to Output Port: FPGA, PAGE-A1:DDR FPGA END (2.50, 5.60) 4 S( O/ R5 f2 t7 D, D+ s, a
WARNING [DRC0004] Possible pin type conflict U1,IO_VB6N1_Y21 Bidirectional Connected to Output Port: FPGA, PAGE-A1:DDR FPGA END (4.90, 3.10) ! E# h: W0 T v/ \/ r+ W
WARNING [DRC0004] Possible pin type conflict U1,IO_VB6N1_Y22 Bidirectional Connected to Output Port: FPGA, PAGE-A1:DDR FPGA END (4.90, 3.20) i9 m5 s" J; j" q; S8 @! ]; `' m/ m
WARNING [DRC0004] Possible pin type conflict U1,IO_VB7N0_AA18 Bidirectional Connected to Output Port: FPGA, PAGE-A1:DDR FPGA END (5.00, 4.70) 9 {8 p* s/ L4 h. i$ U4 O( k U
WARNING [DRC0004] Possible pin type conflict U1,IO_VB6N1_W21 Bidirectional Connected to Output Port: FPGA, PAGE-A1:DDR FPGA END (4.90, 2.60) ! o7 l# g) W; h
WARNING [DRC0004] Possible pin type conflict U1,IO_VB7N0_AB19 Bidirectional Connected to Output Port: FPGA, PAGE-A1:DDR FPGA END (5.00, 5.70)
1 R6 s5 }8 C( M; z; o$ IWARNING [DRC0004] Possible pin type conflict U1,IO_VB6N1_R17 Bidirectional Connected to Output Port: FPGA, PAGE-A1:DDR FPGA END (4.90, 1.70)
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