|
|
EDA365欢迎您登录!
您需要 登录 才可以下载或查看,没有帐号?注册
x
编写DSP程序时,由于代码较长,超过片内RAM空间,所以改为烧写flash$ u* X0 w4 Q+ s( b% l
开始烧写代码,运行程序,结果均正常;然后在此基础上添加一段代码(代码内容类似,没有错误),结果运行程序后,程序跳入非法中断 interrupt void ILLEGAL_ISR(void),不知为何。仅仅是添加一段代码,结果出现非法中断,百思不得其解,请高手指点一下。多谢多谢。! d5 B3 n o# R9 N5 b3 _7 [2 k
程序中cmd文件如下:$ a+ z% n7 A( J. A6 A b
MEMORY; k9 V- T7 e: p- @5 c' V* e. M
{8 C4 B% E( g5 _9 T
PAGE 0: /* Program Memory */& V. L: u6 F& t7 c9 X
/* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE1 for data allocation */
5 M3 n) H) N7 {% s: g# b' N& i, ?! [+ D' ]2 T
ZONE0 : origin = 0x004000, length = 0x001000 /* XINTF zone 0 */8 i3 }& j4 M( t D) q/ A# V& B
RAML0 : origin = 0x008000, length = 0x005000 /* on-chip RAM block L0 */
# x4 l, ~1 {" b/ n /*RAML1 : origin = 0x009000, length = 0x001000*/ /* on-chip RAM block L1 */6 n6 p: B" ]& o- v$ r/ U
/*RAML2 : origin = 0x00A000, length = 0x001000*/ /* on-chip RAM block L2 */
t& z9 C4 V2 K1 M3 u z /*RAML3 : origin = 0x00B000, length = 0x001000*/ /* on-chip RAM block L3 */8 C q# H8 x! i9 t5 v( h
ZONE6 : origin = 0x0100000, length = 0x100000 /* XINTF zone 6 */
0 b& m5 I# d7 ] X; u: A6 ^ ZONE7A : origin = 0x0200000, length = 0x00FC00 /* XINTF zone 7 - program space */6 ]% y( J3 N& _7 M0 q7 C- H4 Q1 d4 g
FLASHH : origin = 0x300000, length = 0x008000 /* on-chip FLASH */% Z( i$ `6 N- Z
/*FLASHG : origin = 0x308000, length = 0x008000*/ /* on-chip FLASH */; a4 G" {; ^' x1 Q% N- K
/*FLASHF : origin = 0x310000, length = 0x008000*/ /* on-chip FLASH */
$ Y4 U# K- [$ ]9 i$ B /*FLASHE : origin = 0x318000, length = 0x008000*/ /* on-chip FLASH */
$ Y( m) G) T. A, ^, Q& _# [1 o* c /*FLASHD : origin = 0x320000, length = 0x008000*/ /* on-chip FLASH */0 o/ n! I1 W( i- B3 v: [" M
/*FLASHC : origin = 0x328000, length = 0x008000*/ /* on-chip FLASH */7 G5 w' o1 q ]& ?5 j
FLASHA : origin = 0x308000, length = 0x012000 /* on-chip FLASH */
5 i9 I& G; i' g% o8 l% y' _ CSM_RSVD : origin = 0x33fF80, length = 0x000076 /* Part of FLASHA. Program with all 0x0000 when CSM is in use. */
1 C0 A% P. D" M BEGIN : origin = 0x33FFF6, length = 0x000002 /* Part of FLASHA. Used for "boot to Flash" bootloader mode. */
( K, d7 R. s9 ?: g7 f- I4 d CSM_PWL : origin = 0x33FFF8, length = 0x000008 /* Part of FLASHA. CSM password locations in FLASHA */
5 I6 Q# P8 A8 g6 r% \7 T OTP : origin = 0x380400, length = 0x000400 /* on-chip OTP */2 M9 W& v) _) H; I- b+ ~3 C
ADC_CAL : origin = 0x380080, length = 0x000009 /* ADC_cal function in Reserved memory */" z% r6 [( y& p( J
" l! R3 f, y4 [* B4 H IQTABLES : origin = 0x3FE000, length = 0x000b50 /* IQ Math Tables in Boot ROM */: L+ i3 b8 G: `' Z) c# M$ @" `
IQTABLES2 : origin = 0x3FEB50, length = 0x00008c /* IQ Math Tables in Boot ROM */ 1 M' v% x6 F8 a( o9 c$ Z9 ^
FPUTABLES : origin = 0x3FEBDC, length = 0x0006A0 /* FPU Tables in Boot ROM */
s1 H& x0 z$ Q0 D+ O8 r ROM : origin = 0x3FF27C, length = 0x000D44 /* Boot ROM */ / x) s$ |9 s) B! u
RESET : origin = 0x3FFFC0, length = 0x000002 /* part of boot ROM */
2 l _5 s' p* H% J5 F VECTORS : origin = 0x3FFFC2, length = 0x00003E /* part of boot ROM */
* ]. q% b8 u! H Q% b8 X( P) F5 e- q: ?/ d1 L2 \5 q. i0 r) d0 T
PAGE 1 : /* Data Memory */) R6 U) C% W+ o; |2 T. D: E/ L
/* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE0 for program allocation */
8 a9 Y- {7 f( }+ ~: c$ H /* Registers remain on PAGE1 */
& ^. U Z8 Y! Z2 l8 O" f5 e4 \
I ^' L# D9 _* w O% h BOOT_RSVD : origin = 0x000000, length = 0x000050 /* Part of M0, BOOT rom will use this for stack */" k( \9 C, Z: Y/ `# s: K/ Y1 y
RAMM0 : origin = 0x000050, length = 0x0003B0 /* on-chip RAM block M0 */' w6 T* x! b2 q0 }# |& K
RAMM1 : origin = 0x000400, length = 0x000400 /* on-chip RAM block M1 */
' H) K* a3 w6 h8 m% | /*RAML4 : origin = 0x00C000, length = 0x001000*/ /* on-chip RAM block L1 */
; C8 H0 l5 d- \* k RAML5 : origin = 0x00D000, length = 0x001000 /* on-chip RAM block L1 */
& T* t9 E$ ~' S3 L RAML6 : origin = 0x00E000, length = 0x001000 /* on-chip RAM block L1 */" `# p6 L( Y D/ |6 c
RAML7 : origin = 0x00F000, length = 0x001000 /* on-chip RAM block L1 */
% h' k4 v4 X( a7 w! j7 A( \& c ZONE7B : origin = 0x20FC00, length = 0x000400 /* XINTF zone 7 - data space */
5 O3 g7 ^1 ~/ j: l. x. ? u2 b; t ZONE7A : origin = 0x210000, length = 0x0100007 W2 u9 |. n, A+ p
/*FLASHB : origin = 0x330000, length = 0x008000*/ /* on-chip FLASH */, I2 N1 q7 `1 v! O. J& b0 d' t
}
! q" G W; d% X# \4 M5 R. x+ e" ]: f" q4 F' k0 V! W! s5 E
/* Allocate sections to memory blocks.
$ Q8 R/ J! p; U* _8 h6 t) g" b Note:0 w9 a5 E, G* e& V2 _; k/ L# X* t& T0 F
codestart user defined section in DSP28_CodeStartBranch.asm used to redirect code3 b, p9 T: j% }! K5 j
execution when booting to flash7 x' C& C7 [4 V9 Z8 h7 {
ramfuncs user defined section to store functions that will be copied from Flash into RAM# A2 g! q; e3 U9 d' S. d
*/
* l; \$ R# N/ s! _" ?# m6 {3 o$ d, u' r3 G
SECTIONS, B5 ]5 a) A; ^, E! r7 h2 c
{
/ X4 _& W0 H! Y7 _- p9 H6 ]3 `: c
, _4 H2 [: C, O" m) V /* Allocate program areas: */- b! f, z7 H! s" ]
.cinit : > FLASHA PAGE = 0+ Z2 R' O. }) U) w. [
.pinit : > FLASHA, PAGE = 0
! u* {. f) t/ |6 J# g0 o .text : > FLASHA PAGE = 0 k1 Z% j5 l$ c
codestart : > BEGIN PAGE = 04 u8 V. G6 s' t. F9 E
ramfuncs : LOAD = FLASHA,( B( B+ G- K u6 W/ I
RUN = RAML0,
* R5 `/ G# g, f LOAD_START(_RamfuncsLoadStart),7 |6 D% i9 s+ h+ P3 ] {
LOAD_END(_RamfuncsLoadEnd),
; O) a3 L% P1 S& w+ D9 e9 C RUN_START(_RamfuncsRunStart),
$ X/ O0 P3 c, F PAGE = 06 Q2 ] @/ x7 q% A" e; _+ ]
- }- d# ^* }) s8 F5 l
csmpasswds : > CSM_PWL PAGE = 06 K$ _1 X: _# a$ @ C5 f
csm_rsvd : > CSM_RSVD PAGE = 0" d+ d& G' @0 ~4 m8 K0 @0 x
; _5 m, D- Y& Z7 t' \( V
/* Allocate uninitalized data sections: */
4 n; _& D9 H7 _3 M7 W6 u( R .stack : > RAMM1 PAGE = 1/ x( I' W7 }8 g. w3 {5 m i: I4 ?
.ebss : > RAML5 PAGE = 1, j7 {# \. P+ I0 j
.esysmem : > RAMM1 PAGE = 1
5 D- v; _* N: }' k9 ?# b- r9 v: ~# n' f4 X' C7 \3 {
/* Initalized sections go in Flash */
7 D2 o1 ?$ L- ]. N- O! f2 k /* For SDFlash to program these, they must be allocated to page 0 */$ ^1 b9 L3 j: I/ ^2 L
.econst : > FLASHA PAGE = 0: Z- O2 a. l7 i; j! X2 S
.switch : > FLASHA PAGE = 0 , S" q7 L! ?! ~5 [/ F
, f" g( P% @" ^( k& v9 v
/* Allocate IQ math areas: */
. H: {- J+ @! S" G9 W) G7 z$ Z& b1 r9 q IQmath : > FLASHA PAGE = 0 /* Math Code */9 f% `$ g& Q. ~! W# Q
IQmathTables : > IQTABLES, PAGE = 0, TYPE = NOLOAD) M. M) _. Y, R# _
IQmathTables2 : > IQTABLES2, PAGE = 0, TYPE = NOLOAD! F7 n1 B3 G. D/ V& G
FPUmathTables : > FPUTABLES, PAGE = 0, TYPE = NOLOAD2 d) U$ d1 O8 v4 R( g# S0 B' O
: |* W9 U2 _4 U1 {
/* Allocate DMA-accessible RAM sections: */
$ S; v- k- D: F DMARAML4 : > RAML5, PAGE = 1# Q3 F& k; W- _! r9 {# @: P/ {
DMARAML5 : > RAML5, PAGE = 1
$ N% p1 s0 ]. f+ |; L# i) p& w DMARAML6 : > RAML6, PAGE = 1
v0 D1 M" q7 r DMARAML7 : > RAML7, PAGE = 19 M6 p( o4 Q* L5 N" f' M
& J8 P8 h* f8 }6 E, M. W
/* Allocate 0x400 of XINTF Zone 7 to storing data */
/ `/ d; y' J. @4 @: J5 @ t data : > ZONE7A, PAGE = 1
, \0 r3 Q% v0 P5 u" q ZONE7DATA : > ZONE7B, PAGE = 12 j& ^6 L8 h! O9 X' G
3 @, \! o& @- ?
/* .reset is a standard section used by the compiler. It contains the */2 I2 l) e+ q7 j% H0 T
/* the address of the start of _c_int00 for C Code. /*
- c: A: W& F% Y5 W3 t* j0 m; D0 a' d /* When using the boot ROM this section and the CPU vector */
2 @& Y# Q/ W) ^. j9 _2 `3 w6 S. [ /* table is not needed. Thus the default type is set here to */$ S5 U6 q+ u( O8 Q/ L& o. Z
/* DSECT */
+ a) c& T! A1 a5 ?; ]# p0 I3 k; u .reset : > RESET, PAGE = 0, TYPE = DSECT- B* L0 H2 U% {! h' ^
vectors : > VECTORS PAGE = 0, TYPE = DSECT, n5 ]; `. F& I4 R$ e
" V# X' W! S& o6 H% S5 i
/* Allocate ADC_cal function (pre-programmed by factory into TI reserved memory) */ h9 z. a5 E0 I8 N" H, c9 K
.adc_cal : load = ADC_CAL, PAGE = 0, TYPE = NOLOAD
' K3 }5 x, t/ \: s/ k7 O5 f4 I5 R, N4 y r. S
}
4 d/ q1 ^' T J- _7 @+ y( R |
|