TA的每日心情 | 开心
2021-4-22 15:40 |
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签到天数: 73 天 [LV.6]常住居民II
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楼主 |
发表于 2019-11-28 16:45
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我感觉Mentor的这种原理图检查工具功能挺强的,只是它的数据库是联网的,对我这样小公司的人来说是不太可能的.难道大家都没有想用工具去检查原理图?人很容易形成定势思维,对错误视而不见.下面是Mentor的Valydate的介绍
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Pin voltage parametric verification for maximum, minimum, and logic thresholds5 R `" d+ n7 z6 r7 `& z6 M) H# G
Bus flip errors (MSB to LSB, TX and RX errors)
$ ^. h+ J& R1 A8 }% r5 Q1 l" nFull multi-board and backplane interface verification
0 C8 l% {' W- f7 a2 T) U+ MPin function compatibility tests
6 Y- R+ L" O/ @7 o5 K2 v2 sSymbol mismatch (to datasheet)* q6 n7 z. v: K) o
Driver/receiver technology matching
) M9 k: F; Q- _9 V6 R: X$ E6 hDiode orientation verification; \. K4 q+ L9 d8 Y6 |- D% w
Driver/receiver function matching
$ y7 z% ^' [6 D* \! i& MPower/ground/open collector/drain shorts6 g! C( _+ M& c1 y! w! ]! G
Capacitor decoupling sufficiency checks6 R" O {" ^% ^7 P* I) U
Capacitor voltage derating (to user derating rules)
( L1 Z& }. a/ t @! o: tRedundant resistors (on a net detection)
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Open collector/drain verification+ ?- M, ]+ w6 R
Poor design practice checks (e.g. using pull-ups, pull downs when needed...)5 X; ]2 c8 q" B. A* P/ r& p8 U' g. A
Power/ground plane connection verification
; x$ L4 K! X7 E) d- X% cComponent power checks: y3 Q& v: ^# g4 Q: ~' y8 x
Multiple or missing power supplies (on a net)
. f Y2 j* q7 n6 D8 W9 o' n7 ADifferential pin verification
4 u5 ?/ A$ S! S1 M3 b) h% S4 L( rUnconnected nets or bus detection
9 J, N& k' k# ^+ n6 ], s. ~6 cOff-board nets detection. H4 e; f: Z) P% Y' `
Overloaded pins identification% G9 j, a2 s2 c9 [: O
Unconnected mandatory pins identification
- b9 ]! T( v/ T' D- m1 @1 B$ S) Y+ @Nets missing driver
- r) D" |7 {0 _Nets missing receiver |
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发表于 2019-11-28 09:46
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支持！
反对！