TA的每日心情 | 衰 2019-11-19 15:29 |
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签到天数: 1 天 [LV.1]初来乍到
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各位大佬好,我在做一个基于FPGA的高数数据采集与处理的系统,用的8位数据采集卡,初步处理后得到16位有符号数据,在接入通过fpga的滤波器ip核设计的低通滤波模块时,编译无错误无警告,但是modelsim仿真时显示以下警告:
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0 M3 s% S# B% ` p- S; o2 L% `# ** Warning: (vdel-134) Unable to remove locked optimized design "_opt". Locker is zhangguangchen@DESKTOP-A0KG7CR.#
) r0 v4 K" F3 u; m0 q# ** Warning: (vdel-134) Unable to remove locked optimized design "_opt1". Locker is zhangguangchen@DESKTOP-A0KG7CR.0 b& B0 B$ a& w4 _* b+ r, ^
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# ** Warning: (vdel-134) Unable to remove locked optimized design "_opt2". Locker is zhangguangchen@DESKTOP-A0KG7CR. G7 S9 f' M3 G
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# add wave *
" I( Q/ M$ ~/ i! B3 O4 _2 w# ** Warning: (vsim-WLF-5000) WLF file currently in use: vsim.wlf& V v$ J- b; b: ^& P* o
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# File in use by: zhangguangchen Hostname: DESKTOP-A0KG7CR ProcessID: 8456' ]% z$ r" d+ |' @! _* n' K
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# Attempting to use alternate WLF file "./wlftx9zv6h".
3 E! H- n# t: A, L' f' R* h- U# ** Warning: (vsim-WLF-5001) Could not open WLF file: vsim.wlf
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# Using alternate file: ./wlftx9zv6h/ l) u! v. Z. c0 B7 L( ~
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而且滤波器输出数据一直为0,在网上很少看到此类问题的解释,求指导的哥哥姐姐指导以下,不胜感激7 `, ~7 ^: `6 `3 K
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