求大神给程序注释一下...急用...，非常感谢！

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library IEEE; ' t/ r9 V7 @& H9 G$ dUSE IEEE.STD_LOGIC_1164.ALL; USE IEEE.STD_LOGIC_UNSIGNED.ALL ; ENTITY keys_lock IS         PORT (   9 _; M2 ^' I8 h& C( }9 O- X6 u        clk ,clr,status  : IN   STD_LOGIC ;                                 selout    : OUT  STD_LOGIC_VECTOR (2 downto 0) ;         key       : IN   STD_LOGIC_VECTOR (3 downto 0) ;         segout    : OUT STD_LOGIC_VECTOR (0  TO 6);     locks,unlocks: OUT STD_LOGIC * x. r4 Y7 z; J/ m          ); + q: c: j, V7 HEND keys_lock ; 4 Z1 i- @8 y* L ARCHITECTURE doit of keys_lock IS signal counter1 : std_logic_vector(1 downto 0); - @6 T4 q/ M% U" B' w3 A/ Osignal counter : std_logic_vector(2 downto 0); signal counter2 : std_logic_vector(4 downto 0); ! L0 A/ z# b' w& D) x/ ?signal dc0,dc1,dc2,dc3,lock0,lock1,lock2,lock3 : std_logic_vector(3 downto 0); signal dcc1 : std_logic_vector(4 downto 0); signal dcc : std_logic_vector(6 downto 0); signal d0,d1,d2,d3 : std_logic_vector(0 to 6); $ ]0 E0 ?  t7 r% E8 usignal clk1,test,koff: std_logic; 8 v3 w: @) w- a$ E& i2 e$ Xcomponent decode 8 l4 _# A# S; {6 S2 g) z6 k  PORT( / ^" H) g, V% f- }    ssin : in  std_logic_vector(3 downto 0);     ssout: out std_logic_vector(0 to 6)     ); # z8 h. x3 q# a' [! E+ t1 S, Wend component; 9 L8 q& h9 y) O- e9 Xbegin test<=key(3) and key(2) and key(1) and key(0); P1: process(clr,clk) begin , R' l6 C+ p' a. [; x" W5 Q   if(clr='0') then      counter1<="00";    elsif(clk'event and clk='1') then      counter1<=counter1+1; & H( O6 ~" j6 u+ p0 }  }   end if; end process P1; 2 z$ Y6 K9 t. \3 A- F  j 6 R  {. m, K( E  I. m& s* J7 Uclk1<='0' when counter1<="01" else . G# l2 L9 M4 r' r0 P2 `" J! g; N      '1'; P2: process(clr,clk1,test) begin    if(clr='0') then % v- z! V% |, {  c2 X( G! A+ @& ]     counter<="000"; ; |' B9 x/ z7 N; o5 v& `* F! K* I" d   elsif(clk1'event and clk1='1') then      if(test='0') or (koff='0') then 5 \% a4 |$ H5 a       counter<=counter;      else $ p  C: k( X7 Q" @       counter<=counter+1;      end if;    end if; end process P2; selout<=counter; dcc<=counter & key; : P* Z* Q8 T/ v# \9 y; C' O P3: process(clk,test) begin    if(clk'event and clk='0') then 2 i: w4 W9 V# w5 h- d( `     if(dcc="0001110") then 7 C' W2 y5 }* o  D& ?& x7 C        dcc1<="00000";      elsif(dcc="0011110") then         dcc1<="00001";      elsif(dcc="0101110") then         dcc1<="00010";      elsif(dcc="0111110") then ; M2 O  U$ A8 _( `/ `$ o        dcc1<="00011";      elsif(dcc="1101110") then         dcc1<="00100";      elsif(dcc="1111110") then         dcc1<="00101"; : i9 M, Z, L. w( Z) l  i0 `     elsif(dcc="0001101") then 6 ~8 f) o. q- i& Z& w        dcc1<="00110";      elsif(dcc="0011101") then . E! M; ]' I! e        dcc1<="00111"; 3 s  ?" j* i9 p% a     elsif(dcc="1001101") then . V' e9 _! H. w2 ^        dcc1<="01000"; - i" G9 Q' g5 E" y) z* u& E+ ~     elsif(dcc="1011101") then ( _1 l" W( q; _  Z# h' t5 z( c        dcc1<="01001";      elsif(dcc="1101101") then         dcc1<="01010"; # m3 V2 \, d0 J0 ]; z: a; w6 q     elsif(dcc="1111101") then 3 H# x5 Z: a6 h& U        dcc1<="01011";      elsif(dcc="0101011") then         dcc1<="01100"; 2 s0 v6 L2 K2 s4 U, r5 @8 u     elsif(dcc="0111011") then / b$ a7 C$ L( u4 {- E; {& q3 A1 R8 l        dcc1<="01101";      elsif(dcc="1001011") then         dcc1<="01110"; 1 s2 {( s/ ]- ~     elsif(dcc="1011011") then   R+ _! W! @+ ~# E+ [) ^        dcc1<="01111"; 6 n/ {4 F$ ~- m6 p& B) _& Q, u+ s     elsif(dcc="1001110") then " z% }' ]- }9 U7 C        dcc1<="10000";      elsif(dcc="1011110") then 0 U, }0 e: M$ w( D! u6 q        dcc1<="10001";      elsif(test='0') then         dcc1<="01111";      end if;    end if; end process P3; 4 ^9 C" q2 v. {8 y+ e ! O7 e3 o5 E1 ~( I/ F9 F--dcc1<="0000" when (dcc="0001110") else 7 r$ E1 S8 @  j0 _; ?, n4 \: o--      "0001" when (dcc="0011110") else --      "0010" when (dcc="0101110") else --      "0011" when (dcc="0111110") else ; X! }+ E5 \2 [2 i- W--      "0100" when (dcc="1101110") else --      "0101" when (dcc="1111110") else ) ]4 O5 e7 X3 A7 g% M--      "0110" when (dcc="0001101") else --      "0111" when (dcc="0011101") else --      "1000" when (dcc="1001101") else 6 M( R! V0 y6 B9 ?3 `--      "1001" when (dcc="1011101") else 3 U+ y& a( }  ^+ S# H" x--     "1010" when (dcc="1101101") else --      "1011" when (dcc="1111101") else --      "1100" when (dcc="0101011") else --      "1101" when (dcc="0111011") else --      "1110" when (dcc="1001011") else 8 ^/ j' g& A! ]5 x0 b, g$ N. A3 g$ m6 Q--      "1111" when (dcc="1011011") else 3 w- O" a8 Y1 k0 \- [" H5 N1 ]--      "0000"; 8 |1 E; ]4 g8 e# W% P+ N P4: process(test,clk,clr) 5 x; {. Y" v" m  |; o; zbegin    if(clr='0') then      counter2<="00000";      koff<='1';    elsif(clk'event and clk='1') then      if(test='0') then   q. {" R, a0 s4 g/ p, D        counter2<="00000"; 8 |/ P8 G0 C* e        koff<='0'; * i, o* K  d" _. k0 w     elsif(counter2<"11110") then         counter2<=counter2+1; 3 ~& k+ s: k: |$ }; g4 X    -- end if;      elsif(counter2="11110") then        koff<='1';      end if; - t7 S9 Q0 g9 B2 ~0 h2 n    end if; % x/ _8 o' \2 Q; ^end process P4; --koff<='0' when counter2<="01110"  else --      '1'; 6 {5 r7 Q$ j2 l$ u" HP5: process(koff,clr) begin    if(clr='0') then       dc0<="0000";       dc1<="0000";       dc2<="0000";       dc3<="0000";       locks<='0'; 6 N( b' @3 x  b4 S; L9 [2 m$ `7 K' K      unlocks<='0';    elsif(koff'event and koff='1') then ) L. V/ W" k% t$ a    if(dcc1="10000" and status='0') then       lock0<=dc0; " P/ f: K1 d7 J      lock1<=dc1;       lock2<=dc2;       lock3<=dc3;   @; L8 Q# f; R1 n- B7 s) q" \2 T* B. x      locks<='1'; : L. ?7 y! }8 l      unlocks<='0';     elsif(dcc1="10001" and status='1') then 0 I' ]$ R5 d" |9 C! ^      if(dc0=lock0 and dc1=lock1 and dc2=lock2 and dc3=lock3) then % l/ |' F! ^# m' ^. f, ?: }        locks<='0'; 5 p6 x! Y6 `, a& s. e        unlocks<='1'; ! }6 P( [. N& `6 K. S4 G      end if; : p+ x' a! W' |/ T0 _/ G) j  o    else   N- y! v/ m. w5 I2 g      dc0<=dcc1(3 downto 0);       dc1<=dc0; 9 n. g. f, k% |      dc2<=dc1; . E( @* I: r3 L* a6 o      dc3<=dc2; ! o$ g# l$ e' [  b. m   end if;   end if; end process P5; U1: decode port map(ssin=>dc0, ssout=>d0); U2: decode port map(ssin=>dc1, ssout=>d1); - g8 v: x# i, b- r' E% rU3: decode port map(ssin=>dc2, ssout=>d2); ' r4 G. N5 B. `4 U, ~. bU4: decode port map(ssin=>dc3, ssout=>d3); 8 r  i' k" ^% K0 h# v! Asegout<=d0 when counter="000" else         d1 when counter="001" else         d2 when counter="010" else 0 X) H' h7 L& H7 K        d3 when counter="011" else , _' W4 x/ ]( l7 D# k        "0000000"; end doit; , H) j- s3 T; z& ~8 S0 m6 }LIBRARY IEEE; USE IEEE.STD_LOGIC_1164.ALL; USE IEEE.STD_LOGIC_UNSIGNED.ALL ; : q, G3 p% n4 nENTITY decode IS PORT(   ssin : in  std_logic_vector(3 downto 0);   ssout: out std_logic_vector(0 to 6) " b/ W. m2 ~3 y, P- W& v; F    ); - d3 ?4 r' a& R/ y. Q) P1 @3 Qend decode; ) W, f9 O0 R" Q$ M, s. |6 TARCHITECTURE a of decode IS begin 4 Z6 z2 S0 M( e' a+ `( m! \  ssout<="1111110" when ssin="0000" else % `+ c: W4 f# D: J& y2 M7 C; v5 d             "0110000" when ssin="0001" else - y! ^) p5 a4 }4 w* I  S* E7 a) t                    "1101101" when ssin="0010" else & l6 i/ V' B; @0 @: G7 h1 L# r* _             "1111001" when ssin="0011" else              "0110011" when ssin="0100" else              "1011011" when ssin="0101" else ! ]) i; y9 H4 j& }             "1011111" when ssin="0110" else , M% w; s1 u" \. a4 L$ J             "1110000" when ssin="0111" else              "1111111" when ssin="1000" else 4 q. r2 h$ W* s# R             "1111011" when ssin="1001" else 5 l, }' o5 F7 o5 N- ]" ?! {1 b             "1110111" when ssin="1010" else              "0011111" when ssin="1011" else 7 M5 l2 X6 P  J, e  q* C1 L, }, z             "1001110" when ssin="1100" else              "0111101" when ssin="1101" else $ b7 d5 _7 `- F             "1001111" when ssin="1110" else              "1000111" when ssin="1111" else % L/ I: U- I# Y) c' U                 "0000000"; ' V6 \3 T6 f* j( `; B( ?+ Send a;

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