verilog 基础语法-数据类型 常量 变量

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verilog 基础语法-数据类型 常量 变量

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&nbsp; &nbsp; 常量： 5 Z. V$ R$ |6 n/ T6 Y/ E&nbsp; &nbsp; &nbsp; &nbsp; 整数：<位宽 num'><进制 b|o|d|h><数字>，例如 4'b1010 &nbsp; &nbsp; &nbsp; &nbsp; x值(不定值)和z值(高阻值，也可用?代替) &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; x和z可以标识某一位或者某一个数字 &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; 4'b10x0,4'bx,4'b101z,4'bz,4'b? &nbsp; &nbsp; &nbsp; &nbsp; 负数：整数最前面加- &nbsp; &nbsp; &nbsp; &nbsp; 下划线：分割数字部分，更加易读(8'b1000_1000) ' ~0 T# M7 y7 c2 ?7 v&nbsp; &nbsp; 参数：parameter &nbsp; &nbsp; &nbsp; &nbsp; parameter 参数名=表达式; &nbsp; &nbsp; &nbsp; &nbsp; 表达式只能是数字或者定义过的参数 ! ^+ |! Q8 ]! u8 s+ |&nbsp; &nbsp; 变量： &nbsp; &nbsp; &nbsp; &nbsp; wire型：wire [n-1:0] 数据名; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; wire表示信号，常用来表示assign关键字指定的组合逻辑信号 5 M. n) }9 a* j&nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; wire型信号可以用作输入，输出 &nbsp; &nbsp; &nbsp; &nbsp; reg型：reg [n-1:0] 数据名; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; 对存储单元的抽象 ) a" e- @" Y8 F&nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; 常用来表示always模块内的指定信号，常代表触发器 ' ]. B4 _: H3 J; j, M9 c&nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; always块内被赋值的每一个信号都必须定义为reg型 &nbsp; &nbsp; &nbsp; &nbsp; memory型：reg [n-1:0] 存储器名[m-1:0]; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; reg [n-1:0]表示基本存储单元的大小 &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; 存储器名[m-1:0]表示基本存储单元的个数，存储空间的容量 : [! J- }" h* {( U&nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; 对存储器进行地址索引的表达式必须是常数表达式 &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; 一个n位寄存器可以在一条赋值语句里进行赋值，而一个完整的存储器不行 ( @+ P8 I6 u, r$ O1 w&nbsp; &nbsp; 运算符及表达式： + f6 E6 _4 N* a5 E( K% F&nbsp; &nbsp; &nbsp; &nbsp; 基本运算符：+ - * / % ) B2 j* d. F. K9 L+ b' A&nbsp; &nbsp; &nbsp; &nbsp; 位运算符：~ & | ^ ^~ / w5 t7 f9 o5 e& X: r&nbsp; &nbsp; &nbsp; &nbsp; 逻辑运算符：&& || ! &nbsp; &nbsp; &nbsp; &nbsp; 关系运算符：< > <= >= 3 K, s9 F$ y, e! D4 l&nbsp; &nbsp; &nbsp; &nbsp; 等式运算符：== != (不管x、z，结果可能是不定值) &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; === !==(对参数的x、z都进行比较) &nbsp; &nbsp; &nbsp; &nbsp; 移位运算符：<< >> , o" ~: o, c2 O* z8 \3 e/ \&nbsp; &nbsp; &nbsp; &nbsp; 位拼接运算符：{ }，将几个信号拼接起来，例如{a,b[3:0],w,3'b100} 3 J: Y" F' E# U' s  {% E5 N&nbsp; &nbsp; &nbsp; &nbsp; 缩减运算符：C =&B;C =|B;C =^B; &nbsp; &nbsp; &nbsp; &nbsp; 优先级别：和c语言差不多，加括号 : C& ?9 T' f3 _6 G6 i&nbsp; &nbsp; 赋值语句： # j8 r; p, ?/ X4 \/ Z&nbsp; &nbsp; &nbsp; &nbsp; 1)非阻塞赋值方式(b <= a) &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; a.块结束才完成赋值 &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; b.b的值不是立刻就改变的 &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; c.在可综合的模块中常用 ( K; I# E1 O. d&nbsp; &nbsp; &nbsp; &nbsp; 2)阻塞赋值方式(b = a) &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; a.赋值语句执行完成后，块才结束 9 L2 M+ c  p, ~+ W6 b5 C&nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; b.b的值在赋值语句执行后立刻改变 % u5 {  b6 w: T* D3 \&nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; c.可能会产生意想不到的结果 " I3 z' }! W' @. V&nbsp; &nbsp; &nbsp; &nbsp; 简单理解： &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; 非阻塞赋值用了多个触发器，每次时钟到达，所有触发器都触发一次 ) ~* a% b1 W9 q&nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; 阻塞赋值连到同一个触发器上，时钟到达，导致所有寄存器被赋值 ---------------------

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