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ction 1: Getting Started : L3 L: Y0 z9 a- z7 T5 j7 |4 v
3 E$ \2 s" e2 C& n3 S/ b This first section is meant to get a user up and running as quickly as possible. It touches
4 h6 a- M1 ]' W) S' L qon multiple topics that are detailed later, and is meant for application and a quick understanding. 0 D' W4 @% y5 @1 e# \
That being said, I think all users should look through this section and make sure they understand 3 O' ?1 ^* N5 a" J7 ~, B: m) ]
it.
9 a3 p9 a" _9 g& ~$ B The last portion of Getting Started covers analyzing results, which is an integral part of 1 \) \* j7 D' z9 y; {
entering constraints. One can't enter core timing or I/O constraints without being able to read the
: |: G: j2 O: [# eanalysis reports, so it is recommended to read that section in conjunction with the information at
+ G) l. |: K6 t3 \0 [the beginning.
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; }$ V& C, c9 H: lQuartus Setup
1 U7 T# Z' [8 M8 U- |+ X. C) D Within Quartus, there are a number of quick steps for setting up your design with * B- b# ^# i- H: M+ ]: d9 ?; Q# V
TimeQuest. These are accessed through the pull-down menu Assignments -> Settings:
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8 U6 {; P7 Y( J1) Along the left panel, select Timing Analysis Settings and select the "Use TimeQuest…" radio
/ q' |" ?" ` k( ibutton. The Classic Timing Analyzer is the old timing analysis engine, which is not
7 ~$ ]: f h3 L2 hrecommended for any new designs or architectures, and will eventually become obsolete. 7 W& O, {, p5 H9 `% n
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2) Select TimeQuest Timing Analyzer in the left panel. The screenshot should look like below,
4 h! y1 R- R0 y4 ]4 U2 W8 S' [1 Q2 {, b# Wwhereby the user can add a new SDC file. SDC stands for Synopsys Design Constraint, which is
. U. E+ P8 K0 b& Hthe format TimeQuest uses, along with many other tools. If no .sdc file exists, we will create it ! a* b3 |' f9 O+ V# b0 c+ v) i b
in the next section. Note that SDC files are analyzed in the order listed, top to bottom. 5 O. r {# i0 x# s2 b0 L
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