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Intersil Synchronous Buck Datasheet& P7 m4 l/ a8 D
Typically, buck converters specify a maximum duty cycle that effectively limits the maximum output voltage that can be realized for a given input voltage. This duty cycle limit ensures that the lowside MOSFET is allowed to turn on for a minimum amount of time during each switching cycle, which enables the bootstrap capacitor (CB in Figure 5) to be charged up and provide adequate gate drive voltage for the high-side MOSFET. See section “High-side Driver Boost Circuit” on page 12 for more details.% m) h$ E3 y% n# X& G$ F1 s
$ S# F6 S* P; M3 ~8 r; L" GHigh-side Driver Boost Circuit5 Q; J' c& k% c, ]4 F. O) L1 n. ^
The gate drive voltage for the high-side MOSFET driver is generated by a floating bootstrap capacitor, CB (see Figure 5). When the lower MOSFET (QL) is turned on, the SW node is pulled to ground and the capacitor is charged from the internal VR bias regulator through diode DB. When QL turns off and the upper MOSFET (QH) turns on, the SW node is pulled up to VDD and the voltage on the bootstrap capacitor is boosted approximately 5V above VDD to provide the necessary voltage to power the high-side driver. A Schottky diode should be used for DB to help maximize the high-side drive supply voltage.
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