mentor ee drc的问题

hardy

exoedion中我在走线的时候由于drc的原因导致线无法走，如何将drc关闭。求教大神

simhfc

Editor Control > Common Settings > 取消 Interactive Place/Route DRC，会有提醒，选Yes。

hardy

simhfc 发表于 2013-6-20 15:02
Editor Control > Common Settings > 取消 Interactive Place/Route DRC，会有提醒，选Yes。

* A: M$ p9 t1 y: ~; t: |  p8 @我想再请教一个问题
( |6 |: M  Z, Vddr的t形拓扑，ces中如何设置，如何查看其中adc adb dc db的长度。
（d是t点，a是cpu端。）先谢过了

simhfc

直接在CES里看啊，见图：

: t  C: l3 v, ]- ^1 v

6 {3 o1 W+ E  Y! V1 XPCB单纯在PCB里，可以打开右键菜单 > Target Length/TOF Delay... > 选任一分支，Current下的就是。

hardy

simhfc 发表于 2013-6-20 21:35
2 v+ B% a9 T! X! a直接在CES里看啊，见图：

在ces中是不是只能在pin pair中查看不能在from to里面查看

simhfc

Fromto和Pin pair的含义不完全一致：
9 b$ u8 c3 e/ q) k
The Difference Between From-Tos and Pin Pairs

4 d' e9 R) B4 NOften times, from-to relationships can be confused with pin pair designations. To better understand these separate design attributes, please refer to the following definitions:
•Net line ordering/from-tos - Ordered, physical pairings of component pins that instruct the router where to etch from and to when creating physical transmission lines (traces).
•Pin pairs - Electrical pairings of component pins that are created for the purpose of defining electrical relationships between component pins in the form of constraints.

* x- f; j/ H- e8 E; i5 J只有定义了Pin pairs，才会生成虚拟节点(Virtual Pins)，也就是你说的T点——d，这样CES才能识别同一trace中的不同区段，才会显示各区段的长度；

# \4 z+ V- M, r. }6 D2 w单纯定义From-to的话，即使实际走线是拓扑结构，CES只识别两个pin之间的trace长度，而忽略拓扑。

xw_superstar

simhfc 发表于 2013-6-22 00:38
5 b4 Z+ j  j. ]/ R$ MFromto和Pin pair的含义不完全一致：

' C, Z2 g) \/ y9 F* t1 @The Difference Between From-Tos and Pin Pairs

! \8 Y$ y( W1 r1 {3 a  W