Cadence_Concept_HDL&Allegro原理图与PCB设计

cloudlilyshen · 发表于 2013-3-26 11:38

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轨迹97 · 发表于 2020-1-21 15:55

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chen1q · 发表于 2014-1-8 16:05

DATA+ AP1_INT
V_REF
+6.6V
-6.6V
C41
0.1uF
C42
0.1uF
R31
50
R41
10k_1%
R42
4.99k_1%
R43
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R44
1M
C92
1nF
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1nF
NC
1
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5
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NC
8
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7
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8
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C10
C0805C106M8PAC
C11
C0805C106M8PAC
C9
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C90
100n
R40
10k
Sensor_data
PIC901 PIC902
COC9 PIC1001
PIC1002
COC10
PIC1101
PIC1102
COC11
PIC4101
PIC4102
COC41
PIC4201
PIC4202
COC42
PIC5601 PIC5602
COC56
PIC9001 PIC9002
COC90
PIC9101
PIC9102 COC91
PIC9201
PIC9202 COC92
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PIR3102COR31
PIR3201
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PIR4001
PIR4002COR40
PIR4101 PIR4102
COR41
PIR4201
PIR4202
COR42
PIR4301
PIR4302
COR43
PIR4401 PIR4402
COR44
PIT201
PIT202
COT2
PIU901
PIU902
PIU903
PIU904 PIU905
PIU906
PIU907
PIU908
COU9
PIU1001
PIU1002
PIU1003
PIU1004 PIU1005
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PIU1008
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PIC1101
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PIR3102
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PIR3202
PIU1006
PIC901
PIC1002
PIC1102
PIC4102
PIC4202
PIC5602
PIC9102 PIC9202
PIR4001 PIR4302 PIT202
PIU1004
PIU1008
PIU1005
PIU1001 PIU908
PIU905
PIU901
PIR3201
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PIR4402 PIU1003
PIC9101
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PIR4201
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PIC5601
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x136644177 · 发表于 2020-8-10 16:41

请问别人电脑上打包过来的原理图无法出网表是什么情况，提示error:keword'file_type' not found on line 1 in the partta~ ble file,or the character':' is missing from the beginning of the key proper~

zhongyiwaiting · 发表于 2013-3-26 12:02

顶一个!!!

osakau · 发表于 2013-3-26 12:21

很老的东西。

hnhjw · 发表于 2013-4-11 11:33

这个真的要好好学习了！

david.dan · 发表于 2013-4-11 13:03

好东西，非常感谢！！！

lgl2466 · 发表于 2013-4-11 13:23

klend · 发表于 2013-4-11 13:24

顶一个，个人觉得没必要用HDL，用ORCAD就足够了。

daisy_ldh · 发表于 2013-4-11 15:10

顶一个！

cxt668 · 发表于 2013-4-11 16:17

可以参考参考

hualu2951 · 发表于 2013-12-16 11:42

很好的东东感谢楼主

denniszeng · 发表于 2014-1-3 14:07

顶一个

tangmaojian@yea · 发表于 2014-9-5 15:46

这个真的要好好学习了！

xiaoronglong · 发表于 2014-9-10 15:17

LZ，allegro Design Entry HDL转成allegro Design Entry CIS怎么弄？

XYX365 · 发表于 2014-9-11 10:09

xiaoronglong 发表于 2014-9-10 15:17
( M9 C" x8 i& {) d# I5 @, L) v6 RLZ，allegro Design Entry HDL转成allegro Design Entry CIS怎么弄？

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