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本帖最后由 紫菁 于 2017-9-14 11:21 编辑 " P1 V+ U) \* z% j* f2 t* p
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下面链接是cadence SPB16.3及最新Hotfix下载地址,需要的可以下载!; P" M0 a" M7 a+ y, Y2 |
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% Q# f5 L4 X( l, A% E3 Y& ]Hotfix057更新的内容如下所示:
9 v: Z3 i; p9 o e+ x. P4 X% r+ oDATE: 12-19-2012 HOTFIX VERSION: 057
( l5 y* r' H0 U% F: V0 R3 {- R===================================================================================================================================
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===================================================================================================================================+ D: y+ w& f2 d5 }
1080193 SIG_INTEGRITY ASSIGN_TOPOLOGY View Topology freeze during the extraction of the net connected to resistor network.4 p2 S( I) I# j
1082509 allegro_EDITOR INTERFACES Export DXF in the 16.3 S056 roatate some pins.6 j; j) Z. k+ W
) X. Q5 p% r; ?: a% {DATE: 12-7-2012 HOTFIX VERSION: 056
; u, m2 T% z- H+ ^===================================================================================================================================
0 `% m1 F9 I" x; fCCRID PRODUCT PRODUCTLEVEL2 TITLE' K$ n# X5 r: [( h: p1 P! \; l5 U
===================================================================================================================================& V% S) \- ^, C- F" L0 D
825813 concept_HDL CORE HDL crashes when copying a property from one H block to other
; K( T- H$ r) g, j871886 CONCEPT_HDL CORE Browse button in Signal Integrity window of DE-HDL option causes program crash2 e4 m) d" J' n- I; Y0 |
871899 CONCEPT_HDL CORE 'Multiple:' column of Grid window in DE-HDL option is too wide
# R) o- P& b) Y- I, f873917 CONCEPT_HDL CORE Markers dialog is not refreshed9 u) M* Z: }/ h4 G6 W4 y
887887 CONCEPT_HDL CORE Option to find unconnected Pins/Nets with DEHDL L License* h( H8 S' O0 s% D2 _0 R7 g
892857 CONCEPT_HDL CORE packager treats R? as a unique reference designator: R1 T) u, b/ V5 T; A
1075587 CONCEPT_HDL PAGE_MGMT Unable to insert page in schematic* ^2 C4 o( n8 _* W: n- E
1078682 ALLEGRO_EDITOR DRC_CONSTR Unaccetable slowness with Slide |
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