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偶也跟一贴！4 ~9 N1 u, B5 \' V. p5 t
以下内容来自《high speed digital system design》。
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A via is a small hole drilled through a PCB that is used to make connections between various* C+ G2 @7 z9 x2 e8 z
layers of the PCB or to connect components to traces. It consists of the barrel, the pad, and
+ h7 w2 G0 r' h4 a; n" ]9 Xthe antipad. The barrel is a conductive material that fills the hole to allow an electrical
3 O! n# ]# e+ Zconnection between layers, the pad is used to connect the barrel to the component or trace,% g l; H) A# F
and the antipad is a clearance hole between the pad and the metal on a layer to which no/ T1 j* T7 {: p9 a7 u/ Y0 g/ V
connection is required. The most common type of via is called a through-hole via because it
9 x0 n2 O# z3 d e- Qis made by drilling a hole through the board, filling it with solder, and making connections on
4 G% ]2 }3 G; m- Gappropriate layers via the pad. Other, less common types of vias, used primarily in multichip
! Q' |% H1 Q6 `/ y0 \modules (MCMs) and advanced PCBs, are blind, buried, and micro-vias. Figure 5.1 depicts. R" l/ Y( Y. ?5 m
a typical through-hole via and its equivalent circuit. Notice that the pads used to connect the
4 K/ l$ W. j! r+ p4 c8 Dtraces on layers 1 and 2 make contact with the barrel and that there is no connection on# {5 w/ a1 E& E( ^% b
layer 3. Blind and buried vias have a slightly different construction. Since through-hole vias! K% T2 z; x. x. y" Q; c
are by far the most common used in industry, they are the focus of this discussion.. r6 l' w3 ^. U* x q9 }
5 {9 s' ^" x# t6 a. q7 k8 |Notice that the via model is simply a pi network. The capacitors represent the via pad* R) b2 G5 G1 H+ U/ t. \* o
capacitance on layers 1 and 2. The series inductance represents the barrel. Since the via& O' l2 F3 m3 B6 {. i
structures are so small, they can be modeled as lumped elements. This assumption, of
( ]/ m4 z* R% H- Ecourse, will break down when the delay of the via is larger than one-tenth of the edge rate.
6 a5 B3 m2 v Y( X2 Y! N7 [The main effect that via capacitance has on a signal is that it will slow down the signal edge
+ ?: l: f, O9 {0 Yrate, especially after several transitions. The amount that the signal edge rate will be slowed
1 {- I$ q% y5 Z( n# m( ycan be estimated by examining the degradation of a signal transmitted through a capacitive
8 }4 F# `3 \# p, G4 J vload, as shown later in this chapter in equation (5.21). Furthermore, if several consecutive1 |; |% A( D9 N" U: R3 K
vias are placed in close proximity to one another, it will lower the effective characteristic- F8 @: k) p5 e8 J* p1 _( i
impedance, as explained in Section 5.3.3. The approximate value of the pad capacitance is1 {0 ?+ U$ y7 e8 e6 r
[Johnson and Graham, 1993]
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, ]) x; [3 `# y; T- z/ {: J[ 本帖最后由 killerljj 于 2007-11-21 20:51 编辑 ] |
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发表于 2007-9-11 14:20
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支持！
反对！
发表于 2008-1-17 21:53
发表于 2007-9-15 15:34
俺也顶一下,因为焊盘描述的太形象啦!