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偶也跟一贴！
% \1 }/ G- R j1 f9 H9 }- i* B ]以下内容来自《high speed digital system design》。
8 j% o' i$ ~: b7 A. v
8 P& j* q& _* l, c* A& ^" NA via is a small hole drilled through a PCB that is used to make connections between various
+ \2 w' v6 _# q! ~layers of the PCB or to connect components to traces. It consists of the barrel, the pad, and
$ O/ @ F W$ K8 ?the antipad. The barrel is a conductive material that fills the hole to allow an electrical
$ v( J, e4 z; ]. T; M( o) [: m1 ^connection between layers, the pad is used to connect the barrel to the component or trace,
: C2 X# I* a$ u( k- O6 Kand the antipad is a clearance hole between the pad and the metal on a layer to which no
4 H2 G! [! u! @3 Pconnection is required. The most common type of via is called a through-hole via because it
, m; ?8 {, L$ Tis made by drilling a hole through the board, filling it with solder, and making connections on* M( a( h* m' l: d N/ q" U. u
appropriate layers via the pad. Other, less common types of vias, used primarily in multichip
& m9 y) j8 A- [9 ~0 d4 gmodules (MCMs) and advanced PCBs, are blind, buried, and micro-vias. Figure 5.1 depicts
0 e% y- P" n) e# [a typical through-hole via and its equivalent circuit. Notice that the pads used to connect the
/ K& }' X" R, Vtraces on layers 1 and 2 make contact with the barrel and that there is no connection on* c# t: \- Q( q1 N* W* p
layer 3. Blind and buried vias have a slightly different construction. Since through-hole vias
( C2 P8 _0 t X# f" B% T: ^! Yare by far the most common used in industry, they are the focus of this discussion. i! [9 L) @+ n \5 Y- E9 M3 l
+ g+ E* ~( l U9 h) ^! S3 R( l
Notice that the via model is simply a pi network. The capacitors represent the via pad- M, V+ V: q' i2 r! k# c; C& f
capacitance on layers 1 and 2. The series inductance represents the barrel. Since the via# r! f4 ^# U% B1 U1 Y
structures are so small, they can be modeled as lumped elements. This assumption, of
! I/ C4 [" F1 q, {- q/ Z# Mcourse, will break down when the delay of the via is larger than one-tenth of the edge rate." J' Y# D2 P I f J! Z$ p
The main effect that via capacitance has on a signal is that it will slow down the signal edge. i8 ?2 ?% U5 ^ n. p0 d
rate, especially after several transitions. The amount that the signal edge rate will be slowed8 ?, S7 N& `) O- d3 E
can be estimated by examining the degradation of a signal transmitted through a capacitive( \. t! l. V1 a" S* W, b6 f
load, as shown later in this chapter in equation (5.21). Furthermore, if several consecutive
3 P* O/ }, R0 n; f _9 V& _vias are placed in close proximity to one another, it will lower the effective characteristic. I) D3 N; |( x& o0 }, }
impedance, as explained in Section 5.3.3. The approximate value of the pad capacitance is
" N u+ [* r3 m+ @4 Q; F[Johnson and Graham, 1993]
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[ 本帖最后由 killerljj 于 2007-11-21 20:51 编辑 ] |
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发表于 2007-9-11 14:20
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支持！
反对！
发表于 2008-1-17 21:53
发表于 2007-9-15 15:34
俺也顶一下,因为焊盘描述的太形象啦!