True-Hspice Device模型参考手册

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Table of Contents
( q3 t; b0 Z) h* D) n; n0 N5 UAudience ............................................................................................. iii
% X) x1 L' V# I" `) WRelated Documents ............................................................................. iii
Conventions ........................................................................................ iv
' x) ^8 U6 ^2 }! l% s8 P6 |+ ZObtaining Customer Support .............................................................. vi
Other Sources of Information ............................................................ vii
, e0 y3 d0 D/ ^- p* {Revision History ............................................................................... viii
Chapter 1 - Overview of Models ..................................................................... 1-1
Using Models to Define Netlist Elements .............................................. 1-2
Supported Models for Specific Simulators ....................................... 1-2
9 s' h0 Q1 m& W$ g" uSelecting Models .............................................................................. 1-3
Example ............................................................................................ 1-3
; |3 K, l- n6 F6 u5 PChapter 2 - Using Passive Device Models....................................................... 2-1
Resistor Device Model and Equations .................................................... 2-2
Wire RC Model ................................................................................. 2-2
4 e+ f% m3 o/ ^  UResistor Model Equations ................................................................. 2-5
8 w3 T5 s+ O! X1 E$ i. B. _Capacitor Device Model and Equations ............................................... 2-10
0 z* G/ R3 L- F2 D! U- z0 Y( DCapacitance Model ......................................................................... 2-10
Capacitor Device Equations ........................................................... 2-11
1 l5 G6 I+ k, d6 H, w9 T% b5 n8 AInductor Device Model and Equations ................................................. 2-14
0 @5 g* X. d4 {$ p* g$ a/ B' @1 EInductor Core Models ..................................................................... 2-15
Magnetic Core Element Outputs .................................................... 2-18
1 W5 T9 E: S# r2 c0 _1 \7 V; LInductor Device Equations ............................................................. 2-19
Jiles-Atherton Ferromagnetic Core Model ..................................... 2-21
Power Sources ....................................................................................... 2-30
5 h! M1 Y+ m. \8 KIndependent Sources ....................................................................... 2-30
# e. d% A7 V* M& {2 d! _Controlled Sources .......................................................................... 2-33
" j1 m9 z4 U  |/ W; KChapter 3 - Using Diodes ................................................................................. 3-1
Diode Types ............................................................................................ 3-2
2 r& c# O! O, J2 t6 T5 H. W: \Using Diode Model Statements .............................................................. 3-3
6 V3 K. k  e# v; xSetting Control Options .................................................................... 3-3
! }1 |: J" w: f* k# O- uSpecifying Junction Diode Models ......................................................... 3-5
' G) u3 Y# v- ?# s8 C, GUsing the Junction Model Statement ................................................ 3-6
Using Junction Model Parameters .................................................... 3-7
Geometric Scaling for Diode Models ............................................. 3-13
Defining Diode Models ................................................................... 3-15
Determining Temperature Effects on Junction Diodes ................... 3-18
Using Junction Diode Equations ........................................................... 3-21
Using Junction DC Equations ......................................................... 3-22
Using Diode Capacitance Equations ............................................... 3-25
3 Y$ G; A% C6 ~0 x3 h2 A/ F5 mUsing Noise Equations .................................................................... 3-27
Temperature Compensation Equations ........................................... 3-28
Using the Junction Cap Model .............................................................. 3-32
4 z6 R/ t' o' Q! ^9 wSetting Juncap Model Parameters ................................................... 3-33
Theory ............................................................................................. 3-33
JUNCAP Model Equations ............................................................. 3-38
Using the Fowler-Nordheim Diode ...................................................... 3-46
" ~, ]9 |! _/ g' ^Converting National Semiconductor Models ........................................ 3-48
- @  J0 A+ U0 uChapter 4 - Using BJT Models ........................................................................ 4-1
Using BJT Models .................................................................................. 4-2
' u' ^1 _; v4 @& \; d$ F# mSelecting Models ............................................................................... 4-2
& F" I2 N( \" HBJT Model Statement ............................................................................. 4-4
Using BJT Basic Model Parameters ................................................. 4-5
Handling BJT Model Temperature Effects ..................................... 4-15
BJT Device Equivalent Circuits ............................................................ 4-21
Scaling ............................................................................................. 4-21
Understanding the BJT Current Convention ................................... 4-21
Using BJT Equivalent Circuits ....................................................... 4-22
BJT Model Equations (NPN and PNP) ................................................. 4-30
. d! ]7 m4 Y' ~- OUnderstanding Transistor Geometry in Substrate Diodes .............. 4-30
Using DC Model Equations ............................................................ 4-32
Using Substrate Current Equations ................................................. 4-33
Using Base Charge Equations ......................................................... 4-34
Using Variable Base Resistance Equations .................................... 4-35
Using BJT Capacitance Equations ........................................................ 4-36
Using Base-Emitter Capacitance Equations ................................... 4-36
Determining Base Collector Capacitance ....................................... 4-38
Using Substrate Capacitance ........................................................... 4-40
2 h( p# s5 a" {Defining BJT Noise Equations ............................................................. 4-42
BJT Temperature Compensation Equations ......................................... 4-44
. u' {* _' j7 aUsing Energy Gap Temperature Equations .................................... 4-44
Saturation and Beta Temperature Equations, TLEV=0 or 2 ........... 4-44
Using Saturation and Temperature Equations, TLEV=1 ................ 4-46
5 h& b$ H$ C3 F0 S' s% U, fUsing Saturation Temperature Equations, TLEV=3 ....................... 4-47
Using Capacitance Temperature Equations .................................... 4-49
Parasitic Resistor Temperature Equations ...................................... 4-51
! e- `" ^1 x. @5 w: L4 [9 t* YUsing BJT Level=2 Temperature Equations .................................. 4-52
BJT Quasi-Saturation Model ................................................................ 4-53
Using Epitaxial Current Source Iepi ............................................... 4-55
Epitaxial Charge Storage Elements Ci and Cx ............................... 4-55
; p8 d6 P4 A8 d0 p! Q! ZConverting National Semiconductor Models ........................................ 4-58
0 I, |$ G6 C6 M) qVBIC Bipolar Transistor Model ........................................................... 4-60
Understanding the History of VBIC ............................................... 4-60
8 F. o: W8 `! f+ O1 b0 U8 mVBIC Parameters ............................................................................ 4-61
) e+ e! p9 k% ]Noise Analysis ................................................................................ 4-62
6 l- M+ h* M2 G/ r( MLevel 6 Philips Bipolar Model (MEXTRAM Level 503) ..................... 4-71
  v* v1 z% R" @3 I4 JLevel 6 Element Syntax .................................................................. 4-71
! B, H0 u/ }' E7 L; N' B- uLevel 6 Model Parameters .............................................................. 4-72
3 `' c- s' z1 z. Y! R; o. m( dLevel 6 Philips Bipolar Model (MEXTRAM Level 504) ..................... 4-78
Notes ............................................................................................... 4-79
. z7 L+ U3 ]* t2 [, Q9 jLevel 6 Model Parameters (504) ..................................................... 4-80
Level 8 HiCUM Model ......................................................................... 4-94
What is the HiCUM Model? ........................................................... 4-94
HiCUM Model Advantages ............................................................ 4-94
: s6 j" r* \# \. c- N! Y* qAvant! HiCUM Model vs. Public HiCUM Model .......................... 4-96
- W" F6 k7 `, Y) b0 V/ vModel Implementation .................................................................... 4-96
Internal Transistors ......................................................................... 4-97
$ s+ ^! ~; [' nLevel 9 VBIC99 Model ...................................................................... 4-110
8 F7 K) C& q! F1 Z1 s, C- v% v7 uElement Syntax of BJT Level 9 .................................................... 4-110
0 P: u+ U" Q8 N0 B& ?- q2 I1 e: qEffects of VBIC99 ........................................................................ 4-112
Model Implementation .................................................................. 4-112
1 L- o) n: S( Q/ p% P0 _Example ........................................................................................ 4-119
VBIC99 Notes for HSPICE Users ................................................ 4-123
Level 10 Phillips MODELLA Bipolar Model .................................... 4-124
8 I! h1 H4 \' p& yModel Parameters ......................................................................... 4-124
# g2 G+ \6 [0 P6 C$ I6 z/ d4 Q: pEquivalent Circuits ........................................................................ 4-129
DC Operating Point Output .......................................................... 4-131
Model Equations ........................................................................... 4-132
Temperature Dependence of the Parameters ................................ 4-142
  V/ p" K5 m6 {3 }- bLevel 11 UCSD HBT Model .............................................................. 4-146
6 ?6 `3 b  ^5 p8 J6 zUsing the UCSD HBT Model ....................................................... 4-146
Description of Parameters ............................................................. 4-147
; L: M! `( H6 wModel Equations ........................................................................... 4-152
Equivalent Circuit ......................................................................... 4-163
) X* _/ g9 ?0 C+ y9 R- [  WExample Avant! True-Hspice Model Statement ........................... 4-165
Chapter 5 - Using JFET and MESFET Models............................................. 5-1
Understanding JFETs .............................................................................. 5-2
* s# B" f$ \: {$ V* A; G- lSpecifying a Model ................................................................................. 5-3
' l4 D- t+ z6 H! p  PUnderstanding the Capacitor Model ....................................................... 5-5
+ s; ]# @) E  U1 i" [Model Applications ........................................................................... 5-5
( F" J4 _5 L5 d: NControl Options ................................................................................. 5-6
- B) u% y# K* x: IJFET and MESFET Equivalent Circuits ................................................. 5-7
7 U6 W6 E* o2 f, sScaling ............................................................................................... 5-7
8 Y2 L" n0 |  EUnderstanding JFET Current Convention ........................................ 5-7
; a# U! s) U8 p7 r% ?7 TJFET Equivalent Circuits .................................................................. 5-8
JFET and MESFET Model Statements ................................................. 5-13
$ T' o' m* b  {1 YJFET and MESFET Model Parameters ........................................... 5-13
/ s: S6 v. r( Y  |: {0 o& T. vGate Diode DC Parameters ............................................................. 5-15
" y+ Y; z0 q1 D; s+ G/ WJFET and MESFET Capacitances ................................................... 5-25
Capacitance Comparison (CAPOP=1 and CAPOP=2) ................... 5-29
& r* I) |. E% PJFET and MESFET DC Equations ................................................. 5-31
8 x5 |' F6 c8 D2 |9 XJFET and MESFET Noise Models ....................................................... 5-35
Noise Parameters ........................................................................... 5-35
& S+ p+ C. E8 \& [$ o9 r' J& H; nNoise Equations .............................................................................. 5-35
5 k& Y% G( i' W5 Y* t$ jNoise Summary Printout Definitions .............................................. 5-36
JFET and MESFET Temperature Equations ........................................ 5-37
; W( q" y5 f! ~2 E2 w) jTemperature Compensation Equations ........................................... 5-40
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