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Table of Contents$ i( T5 X+ S' F4 S; b
Audience ............................................................................................. iii, d1 a2 J+ Z( _' k, c# w% S
Related Documents ............................................................................. iii
& i; L2 ?* m! eConventions ........................................................................................ iv2 G1 w/ B: |& u( Y3 P% M
Obtaining Customer Support .............................................................. vi* v K4 e* l0 q
Other Sources of Information ............................................................ vii
1 S" ^) t0 @" ARevision History ............................................................................... viii" c( F0 c# r% U" T
Chapter 1 - Overview of Models ..................................................................... 1-1
9 w7 r! o! r# o* r; ~! o0 cUsing Models to Define Netlist Elements .............................................. 1-2
5 ^ |, F& Q: ESupported Models for Specific Simulators ....................................... 1-2
# Z; r$ I, W& R$ l2 |7 h! t( NSelecting Models .............................................................................. 1-3
$ }# v7 [; @5 M, j; x8 WExample ............................................................................................ 1-3, h3 Z& d- C, _8 m$ B$ T
Chapter 2 - Using Passive Device Models....................................................... 2-11 x0 A' T, N) q
Resistor Device Model and Equations .................................................... 2-2
$ i8 g( @ ~" |" l: |Wire RC Model ................................................................................. 2-2
Z5 O9 l7 {# x( c" xResistor Model Equations ................................................................. 2-5# @6 |$ T6 q) r
Capacitor Device Model and Equations ............................................... 2-10* R7 y6 I& h6 E$ y( w) q
Capacitance Model ......................................................................... 2-10
! [! { y$ a" S& [; f9 kCapacitor Device Equations ........................................................... 2-11. \9 W+ J# d+ R) J
Inductor Device Model and Equations ................................................. 2-14
# Z8 S; G0 N1 q6 Y$ QInductor Core Models ..................................................................... 2-15) ^/ P6 @: M, a" X, q2 ?5 Q
Magnetic Core Element Outputs .................................................... 2-18, H+ c8 z4 }+ j, E
Inductor Device Equations ............................................................. 2-19
6 C% h1 i/ `# |# ` G: g% @Jiles-Atherton Ferromagnetic Core Model ..................................... 2-21: P. [' h) n6 u; }7 J3 d4 b9 ]
Power Sources ....................................................................................... 2-30
3 E, {) [3 l$ A9 cIndependent Sources ....................................................................... 2-30
- u8 A. b" F& l- d8 ~Controlled Sources .......................................................................... 2-33
q9 _9 F* r3 E5 G. aChapter 3 - Using Diodes ................................................................................. 3-1
( E3 G7 I; ]5 {3 _" B9 T$ H" }5 BDiode Types ............................................................................................ 3-2/ V9 w, s+ \9 O1 V5 g/ g' F
Using Diode Model Statements .............................................................. 3-3
, ]/ Z. C$ W0 a0 pSetting Control Options .................................................................... 3-3
7 b. X5 r$ z% u, E$ O, O+ rSpecifying Junction Diode Models ......................................................... 3-57 e9 g. t/ V" E7 F b- Y. o
Using the Junction Model Statement ................................................ 3-6
8 ]7 j6 Z. p' G2 n& P7 gUsing Junction Model Parameters .................................................... 3-7
( Z& C& I6 X% K; v' d, {+ J* O, \Geometric Scaling for Diode Models ............................................. 3-139 Z# ^% ~3 R' Z& y6 V* A% [
Defining Diode Models ................................................................... 3-15" d, v" k2 z* U- g7 J, V4 A
Determining Temperature Effects on Junction Diodes ................... 3-18) p* h" f- I, G) ?/ j
Using Junction Diode Equations ........................................................... 3-21, y: C- n/ }* n, E9 E! [
Using Junction DC Equations ......................................................... 3-22
5 v G' ?* W$ b. WUsing Diode Capacitance Equations ............................................... 3-25
0 o0 `' {+ `4 S2 bUsing Noise Equations .................................................................... 3-27
# n3 b3 R5 R- F; ~& XTemperature Compensation Equations ........................................... 3-28
: A* K( [3 v+ ?& T& m$ v# cUsing the Junction Cap Model .............................................................. 3-32/ I, T" [' x( X& M8 h$ S
Setting Juncap Model Parameters ................................................... 3-330 j3 t2 \+ n0 s9 o8 V
Theory ............................................................................................. 3-33; d# ~0 x' q* s# \! T; ]
JUNCAP Model Equations ............................................................. 3-38# N X0 K& ~! k' D1 ]
Using the Fowler-Nordheim Diode ...................................................... 3-46
B0 m( M8 b* _2 M6 m) T$ PConverting National Semiconductor Models ........................................ 3-485 O3 I2 o/ R2 S8 I" v& l
Chapter 4 - Using BJT Models ........................................................................ 4-1
9 U) Z; S" h! F$ u3 G& lUsing BJT Models .................................................................................. 4-2% @1 {3 ^4 x* e5 E: M
Selecting Models ............................................................................... 4-25 z* s. N' y5 H) \, [3 e# I
BJT Model Statement ............................................................................. 4-4
+ o+ p1 A; j5 k( _# C3 o* U1 x. FUsing BJT Basic Model Parameters ................................................. 4-5
* ^2 K% [! q. kHandling BJT Model Temperature Effects ..................................... 4-15( X/ `5 y5 |0 }9 M: ^: p. S5 Y
BJT Device Equivalent Circuits ............................................................ 4-212 w7 k3 D/ `% y3 _; Y
Scaling ............................................................................................. 4-21
7 X8 [ _2 H, v' s. P7 uUnderstanding the BJT Current Convention ................................... 4-215 P. ^% c4 G, T& a
Using BJT Equivalent Circuits ....................................................... 4-22- v+ V# e# p, x
BJT Model Equations (NPN and PNP) ................................................. 4-30% m+ U- E. T: u4 F8 X" O
Understanding Transistor Geometry in Substrate Diodes .............. 4-30; t, n- Q8 {' V" d1 } a% ^
Using DC Model Equations ............................................................ 4-32
- J& o' P2 p$ @* O+ EUsing Substrate Current Equations ................................................. 4-33
+ y# i% l$ e2 u: SUsing Base Charge Equations ......................................................... 4-34
& U, C3 _5 D" f$ zUsing Variable Base Resistance Equations .................................... 4-35$ o+ @3 X0 W; C. B, }
Using BJT Capacitance Equations ........................................................ 4-364 w' [2 B3 S8 X
Using Base-Emitter Capacitance Equations ................................... 4-36
+ i" n U" A z8 L/ \Determining Base Collector Capacitance ....................................... 4-38/ j0 N+ i% G2 e2 g! d
Using Substrate Capacitance ........................................................... 4-40
+ F6 }# ~3 Q# g) V* d4 VDefining BJT Noise Equations ............................................................. 4-42
( X8 I. A" y) p. N3 Q9 P; DBJT Temperature Compensation Equations ......................................... 4-44$ X+ i3 @2 n. G$ o
Using Energy Gap Temperature Equations .................................... 4-44
. M& u, J$ G% S* r; O% Y+ l' oSaturation and Beta Temperature Equations, TLEV=0 or 2 ........... 4-44
& }) ~. D8 ?2 kUsing Saturation and Temperature Equations, TLEV=1 ................ 4-46
' _# S2 @/ C: B9 M% W- G! {9 QUsing Saturation Temperature Equations, TLEV=3 ....................... 4-47, F8 w& e$ i1 A3 ] N$ x$ s
Using Capacitance Temperature Equations .................................... 4-49
& I: k; b# o# D6 x8 GParasitic Resistor Temperature Equations ...................................... 4-51
* _& g& L0 Q# l! T/ o6 R( hUsing BJT Level=2 Temperature Equations .................................. 4-520 E$ J2 t; g8 T& H
BJT Quasi-Saturation Model ................................................................ 4-533 o7 V! Q( F( q0 T6 h1 L
Using Epitaxial Current Source Iepi ............................................... 4-554 H$ k& R) [) ~, f7 O* o
Epitaxial Charge Storage Elements Ci and Cx ............................... 4-55& V8 G$ d6 ?/ E, E
Converting National Semiconductor Models ........................................ 4-58& X( j+ [; c& }8 d
VBIC Bipolar Transistor Model ........................................................... 4-60
. O7 W. y& r' R2 s, e7 o) G' \Understanding the History of VBIC ............................................... 4-60
9 q3 m$ A: O/ K0 j+ d+ ]$ LVBIC Parameters ............................................................................ 4-61
@% B2 h5 I6 S* w4 _$ fNoise Analysis ................................................................................ 4-62
y' L# e: O- M1 a! O6 M$ rLevel 6 Philips Bipolar Model (MEXTRAM Level 503) ..................... 4-71
: ^/ @2 u% R& u0 pLevel 6 Element Syntax .................................................................. 4-71
" Z0 a5 E8 a: O9 @7 Q% KLevel 6 Model Parameters .............................................................. 4-72/ y5 F3 \; t1 @$ w
Level 6 Philips Bipolar Model (MEXTRAM Level 504) ..................... 4-78
$ r, |# w: _3 r: ^- r: m, R d* yNotes ............................................................................................... 4-79! r: O6 e% K+ E. N
Level 6 Model Parameters (504) ..................................................... 4-80
6 ~$ g% [% P# s6 O/ QLevel 8 HiCUM Model ......................................................................... 4-94; ]& S) U& M' O; `
What is the HiCUM Model? ........................................................... 4-948 E! a Y, n, T, v! U" ]9 N
HiCUM Model Advantages ............................................................ 4-94
( l6 y5 }7 ^2 F) {7 C* ~; I& UAvant! HiCUM Model vs. Public HiCUM Model .......................... 4-96
+ E9 }3 E8 c* ?8 [3 rModel Implementation .................................................................... 4-96
8 ?: a! }' q- W, x+ uInternal Transistors ......................................................................... 4-97. o9 _" b1 a1 U( ~4 Q" M
Level 9 VBIC99 Model ...................................................................... 4-110, |# q m0 q) {6 n: C8 y
Element Syntax of BJT Level 9 .................................................... 4-110
1 ]1 ?. {5 X. \$ ~: ~3 q( g2 I6 hEffects of VBIC99 ........................................................................ 4-112
7 o% L1 j( c E. l) r7 AModel Implementation .................................................................. 4-112
% ]' d& g9 Q" K7 hExample ........................................................................................ 4-119
3 B3 W. _1 G/ x! C; e2 S$ I- U9 RVBIC99 Notes for HSPICE Users ................................................ 4-123' \) T2 l. I* [ N9 i
Level 10 Phillips MODELLA Bipolar Model .................................... 4-124) s5 r* }' S3 k p3 h7 x/ c
Model Parameters ......................................................................... 4-124
* d/ |* _' U8 M) d4 @Equivalent Circuits ........................................................................ 4-1290 v" o( n( R; G* d' _
DC Operating Point Output .......................................................... 4-131. P& ^9 {' s u: t. E: v
Model Equations ........................................................................... 4-132
; P. s f1 [! Y2 lTemperature Dependence of the Parameters ................................ 4-142
+ p0 V& Y5 I/ e ~Level 11 UCSD HBT Model .............................................................. 4-146
+ ?$ J( y# ~4 X. v% e# rUsing the UCSD HBT Model ....................................................... 4-146
$ y# v$ q- G: n/ C# rDescription of Parameters ............................................................. 4-147
8 e8 C* T, ^; d4 CModel Equations ........................................................................... 4-1525 |/ ?0 V/ p; I2 W' J
Equivalent Circuit ......................................................................... 4-163; P# m- G# H6 @! z
Example Avant! True-Hspice Model Statement ........................... 4-165
+ t# Y, c9 e2 r0 rChapter 5 - Using JFET and MESFET Models............................................. 5-1. _, e! T+ N6 ~
Understanding JFETs .............................................................................. 5-28 b g2 |+ J0 i, M* W( Y& g
Specifying a Model ................................................................................. 5-3" Y* y/ h5 W/ G& o3 M
Understanding the Capacitor Model ....................................................... 5-5/ S# _2 z" U6 t. |5 x- t
Model Applications ........................................................................... 5-51 m9 C: w' s5 L3 d3 w' t) [9 P
Control Options ................................................................................. 5-6
+ k6 t* S6 ]1 d. J6 D7 gJFET and MESFET Equivalent Circuits ................................................. 5-71 Z! \6 Q" Y, {# Q. m
Scaling ............................................................................................... 5-78 S; _; f; I% ~8 E
Understanding JFET Current Convention ........................................ 5-7
& `0 G7 {) a, t6 U; M# n3 KJFET Equivalent Circuits .................................................................. 5-8+ K7 ?- T( c, B' U* {
JFET and MESFET Model Statements ................................................. 5-13/ h5 C$ d0 D1 \, j) h T- j
JFET and MESFET Model Parameters ........................................... 5-13* G. t$ m/ f6 h, z c" @
Gate Diode DC Parameters ............................................................. 5-150 N& w: Z0 o; F& A* a
JFET and MESFET Capacitances ................................................... 5-258 ^, A2 I( ^3 f0 ^' Q5 S
Capacitance Comparison (CAPOP=1 and CAPOP=2) ................... 5-29
2 U9 o$ w0 L+ @; qJFET and MESFET DC Equations ................................................. 5-31
2 d9 J5 p0 y Z5 I2 z: uJFET and MESFET Noise Models ....................................................... 5-35
! S4 q' s+ F$ L3 s/ w- uNoise Parameters ........................................................................... 5-35
- x- ~1 ?9 ^9 H$ WNoise Equations .............................................................................. 5-35
6 E+ D# ^: H; C1 c9 O% ^Noise Summary Printout Definitions .............................................. 5-36
8 H9 a4 j f% a5 T. C) R; ]4 VJFET and MESFET Temperature Equations ........................................ 5-376 b3 @- K5 p y/ e$ {
Temperature Compensation Equations ........................................... 5-40
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发表于 2008-3-25 17:14
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thanks a lot ,very good materials