[AD 10][6层]TI处理器PCM1864DBTR的音频处理板（PCM1864DBTR+LVC1G125+LVC1G126）...

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作品名：[AD 10][6层]TI处理器PCM1864DBTR的音频处理板（PCM1864DBTR+LVC1G125+LVC1G126）原理图和PCB源文件

文件描述

1. 作品用途：TI处理器PCM1864DBTR的音频处理板
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2. 软件版本：AD 10

3. 层数：6层板
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4. 用到的主要芯片：PCM1864DBTR+LVC1G125+LVC1G126

5. PCB尺寸：半径：37.5mm
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作品截图如下：
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2 m' j6 u9 O9 l* B7 ?3 t顶层截图：
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底层截图：
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全层截图：

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. G8 e( _, d$ p  |) _7 ^# [* x叠层信息截图如下：
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BOM：
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Comment（属性）	Designator（位号）	Footprint（封装）	Quantity（数量）
GRM188R71C104KA01D	C1, C2, C3, C4, C5, C6, C7, C17, C23, C25, C29, C31, C37, C39	0603L	14
GRM21BR71A106KE51K	C8, C9, C10, C11, C12, C13, C14, C15, C16, C18, C19, C20, C21, C22, C30, C32, C33, C34, C35, C36	0805_KTR	20
GRM188R71C105KA12D	C24, C26, C38, C40	0603L	4
GRM1885C1H180JA01D	C27, C28	0603L	2
3.3V	D1	LED_LTST-C171	1
BIASA	D2	LED_SMLP12_BLUE	1
BIASB	D3	LED_SMLP12_BLUE	1
Fiducial	FID1, FID2, FID3	Fiducial10-20	3
M3	H1, H2, H3, H4	BuildingFastener_MPMS_003_0005_PH	4
24438	H5, H6, H7, H8	Keystone24438	4
DNP	J1	CONN_PEC04DAAN	1
Master/Slave	J2	Sullins_PBC02SAAN	1
USB-I2X	J3	Sullins_PPPC082LJBN-RC	1
3.3V-USB	J4	Sullins_PBC02SAAN	1
DSP	J5	TSW-110-07-G-D	1
PBC02DAAN	J6	Sullins_PxC02DAAN	1
BIASA	J7	Sullins_PBC02SAAN	1
BIASB	J8	Sullins_PBC02SAAN	1
SPH1642HT5H-1	MIC1, MIC2, MIC3, MIC4, MIC5, MIC6, MIC7, MIC8	Knowles_SPH1642HT5H-1	8
MMBT2222A	Q1, Q2	SOT-23	2
RC0402FR-0749R9L	R1, R2, R3, R4, R6, R7, R8, R9, R10, R11, R12, R13, R16, R17, R19, R21, R40, R41, R42, R43, R45, R46, R49, R50, R51, R52, R54, R55, R56, R57, R59, R60, R61, R62	0402L	34
ERJ-3EKF1002V	R5	0603L	1
CRCW04022K21FKED	R14, R15, R27, R28, R29, R30, R36, R37, R38, R39	0402L	10
CRCW0402360RJNED	R18	0402L	1
ERJ-2RKF1000X	R20, R53	0402L	2
CRCW06030000Z0EA	R22, R23, R24, R25, R26, R31, R32, R33, R34, R35, R44, R48	0603L	12
CRCW04022K15FKED	R47, R58	0402L	2
SNT-100-BK-G	SH1, SH2, SH3, SH4	SNT-100-BK-G	4
GND	TP1	TestPoint_50x20-TH	1
3.3V	TP2	TestPoint_50x20-TH	1
SCL	TP3	TestPoint_50x30-TH	1
SDA	TP4	TestPoint_50x30-TH	1
GND	TP5, TP6, TP27, TP28, TP29, TP30, TP51, TP52, TP53, TP54	TestPoint_50x30-TH	10
BIAS1	TP7	TestPoint_50x30-TH	1
BIAS2	TP8	TestPoint_50x30-TH	1
BIAS3	TP9	TestPoint_50x30-TH	1
BIAS4	TP10	TestPoint_50x30-TH	1
IN1+	TP11	TestPoint_50x30-TH	1
IN2+	TP12	TestPoint_50x30-TH	1
IN3+	TP13	TestPoint_50x30-TH	1
IN4+	TP14	TestPoint_50x30-TH	1
IN1-	TP15	TestPoint_50x30-TH	1
IN2-	TP16	TestPoint_50x30-TH	1
IN3-	TP17	TestPoint_50x30-TH	1
IN4-	TP18	TestPoint_50x30-TH	1
D1A	TP19, TP20	TestPoint_50x30-TH	2
D2A	TP21, TP22	TestPoint_50x30-TH	2
CLKA	TP23, TP24, TP25, TP26	TestPoint_50x30-TH	4
BIAS5	TP31	TestPoint_50x30-TH	1
BIAS6	TP32	TestPoint_50x30-TH	1
BIAS7	TP33	TestPoint_50x30-TH	1
BIAS8	TP34	TestPoint_50x30-TH	1
IN5+	TP35	TestPoint_50x30-TH	1
IN6+	TP36	TestPoint_50x30-TH	1
IN7+	TP37	TestPoint_50x30-TH	1
IN8+	TP38	TestPoint_50x30-TH	1
IN5-	TP39	TestPoint_50x30-TH	1
IN6-	TP40	TestPoint_50x30-TH	1
IN7-	TP41	TestPoint_50x30-TH	1
IN8-	TP42	TestPoint_50x30-TH	1
D2B	TP43, TP46	TestPoint_50x30-TH	2
D1B	TP44, TP45	TestPoint_50x30-TH	2
CLKB	TP47, TP48, TP49, TP50	TestPoint_50x30-TH	4
PCM1864DBTR	U1, U2	DBT0030A_N	2
LVC1G125	U3, U5, U7	DCK0005A_N	3
LVC1G126	U4, U6, U8	DCK0005A_N	3
9B-24.576MEEJ-B	Y1	TXC_9B	1

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" V  T2 D! D1 i6 O; Y) v9 V原理图和PCB源文件如下：

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