找回密码
 注册
关于网站域名变更的通知
查看: 928|回复: 9
打印 上一主题 下一主题

还有没有在用0RCAD10.3精简版本的朋友?昨天开始不能使用了!

[复制链接]

该用户从未签到

跳转到指定楼层
1#
发表于 2019-12-25 08:52 | 只看该作者 回帖奖励 |倒序浏览 |阅读模式

EDA365欢迎您登录!

您需要 登录 才可以下载或查看,没有帐号?注册

x
还有没有在用0RCAD10.3精简版本的朋友?昨天开始不能使用了!把系统时间往前调一天就可以了,好像是时间到期了,现在网上下载的10.3和10.5都不能用了,时间调一下就可以了,有没有哪位朋友遇到这个问题?

该用户从未签到

2#
发表于 2020-1-6 10:18 | 只看该作者
我也碰到这个问题。

该用户从未签到

3#
发表于 2020-1-6 10:49 | 只看该作者
SERVER xxx ANY 27001$ l4 d# S4 Z7 |# o& w, L
DAEMON cdslmd c:\cdslmd.exe
9 N2 v% j5 i! _' a# --------------------------------------------------------------------
4 i9 ]2 Y9 k: W: j#
" {/ C  i( x0 R#       License for Cadence PSD Series
! k( \2 h% D4 L7 h( K+ }#
5 a2 G/ u9 _) _$ L4 A$ {# --------------------------------------------------------------------
3 {/ Z- [& S2 Y5 j#       Generated especially for' Y' }" _2 Q8 M; @, k5 }, s! s4 C. D3 Q
#       User:    xp04
# Z6 ]7 d* A* L  w: k#       Company:5 B7 e  ?+ k, P4 p- B" s- i
# --------------------------------------------------------------------
) `, M6 i) N6 @: j3 }; H. ~#) \- S) E3 P7 r+ s7 V5 m8 u( z
#       Mendling with Feature lines will only invalidate them!
# ~( |) w' d4 X9 P. O2 q#+ T) {6 N: R7 w9 @0 j* `- x; n
# --------------------------------------------------------------------
/ a4 v6 O1 F2 V4 Y  _+ f7 b#
+ U" A. {& J+ O4 ]  n. TPACKAGE EFA-CDS-01 cdslmd 2019.12 50D0C0F14EEEF46F0FE0 \7 B$ g( L- h0 N! c1 m4 o( T
        COMPONENTS="A2dxf ABIT actomd adv_package_designer_expert \1 v$ w- v" z9 E* t: o# M
        adv_package_engineer_expert ADV_USUPUC_ALL \
, v+ d" c' Q( R* X8 S7 a        Advanced_Package_Designer Affirma_NC_Simulator \
5 P0 K5 Q* H+ Y        Affirma_sim_analysis_env Affirma_transaction_analysis \
5 d5 ]( A4 t" I; P/ c, X( r9 z  X! O- Z- P        Affirma_verification_cpit_rtim Allegro_CAD_Interface \/ I/ Y( h; A$ z
        Allegro_design_expert Allegro_Designer Allegro_designer_suite \
% y) {8 e, k( g4 T9 Z3 a, R, [) z        allegro_dfa allegro_dfa_att Allegro_Expert Allegro_Librarian \8 O3 ]6 m# v+ L
        allegro_non_partner Allegro_PCB Allegro_PCB_Interface \! K5 u1 e9 l: w8 m) Z1 p5 q) G( g
        Allegro_performance Allegro_studio Allegro_Symbol \4 T7 w+ H8 t9 M% Q, ]0 J
        Allegro_Viewer_Plus allegroprance ANALOG_WORKBENCH APD \7 t' p# K- w- `$ l6 Y
        archiver arouter AWB_Batch AWB_BEHAVIOR AWB_DIST_SIM \
7 [+ t" e5 L5 q1 I, L        AWB_MAGAZINE AWB_MAGNETICS AWB_MIX AWB_PPLOT AWB_RESOLV_OPT \* F( {% l0 F6 X2 ], U) G% R8 }
        AWB_RESOLVE_OPT"  M& n9 P3 T: a
PACKAGE EFA-CDS-02 cdslmd 2019.12 006030C10306920F9721 \
- Q/ `$ T; r7 t        COMPONENTS="AWB_SIMULATOR AWB_SMOKE AWB_SPICEPLUS AWB_STATS \# X0 c& w* e# ?  o1 Q: F: A4 ?
        AWBAA AWBSimulator Base_Digital_Body_Lib Base_Verilog_Lib \8 j/ |5 C! u" A& T( v
        BOARDQUEST BoardQuest_Designer BoardQuest_Team BOGUS \
  f6 |+ p8 l, ^2 ]' O$ _' ]        Cadence_chip_assembly_rtr_ALL Cadence_chip_assembly_rtrEngr \9 A, j( i6 h% W8 @
        caeviews cals_out Capture Capture_CIS_Studio CaptureCIS \
0 L( s$ X" H6 T  F% V/ g! \        cbds_in cdxe_in CHDL_DesignAccess CheckADV_ALL CheckFST_ALL \
7 N# z- F! ~2 V# D% p        Checkplus_Expert CISoption comp Concept_HDL_expert \
; J3 g6 _$ n$ b9 f9 g4 s& j        Concept_HDL_rules_checker Concept_HDL_studio ConceptHDL \1 m4 }$ Q8 U+ _! N2 \2 G
        CP_Ele_Checks cpe crefer cvtomd CWAVES debug DFM_USUPUC_ALL \# I6 V9 n" G; l9 B' T3 d( A" ]3 L" p
        DISCRETE_LIB dracula_in"# ?$ ?! D8 ^6 I* I3 X! `
PACKAGE EFA-CDS-03 cdslmd 2019.12 40A0708139C03D1415F7 \
) V, A  R' }+ v- O/ I        COMPONENTS="dxf2a EB_4SUPUC_ALL EB_USUPUC_ALL eCapture \" H/ ]$ O$ C' k$ l, w! b4 x
        EDIF_Netlist_Interface EDIF_Schematic_Interface EditBase_ALL \
/ d0 c5 J4 f2 b0 B5 P3 P: M; B        EditFST_ALL EditPlace_ALL EditRoute_ALL EMCdisplay EMControl \
% S' Q, ]- p: q! `' x! f        EMControl_Float EMI_ALL expert expgen explorer Express \
) ~8 [7 B, M* C% V- ?$ q1 L        ExpressPlus Extended_Digital_Body_Lib Extended_Verilog_Lib \
! F* s: N* d( D        fethman fetsetup FloatPC_ALL floorplan Framework \
! \; p4 o- C! R        fst_Usupuc_all FUNCTION_LIB gbom glib gloss gphysdly gscald \% |# g  `- r5 B! u# Q
        gspares HDL-DESKTOP hp3070 HYB_USUPUC_ALL IC_autoroute_ALL \: Q  Y( ^9 {1 B0 ?0 l9 I: H
        IC_device_place_ALL IC_devicegen_ALL"
4 e8 T& k- b3 N0 {0 b8 qPACKAGE EFA-CDS-04 cdslmd 2019.12 30801091DAE1B711FC58 \* i' F- p6 L/ n/ e: \
        COMPONENTS="IC_deviceplace_ALL IC_edit_ALL IC_editfast_ALL \
2 @- @5 l" I9 P* i: V: N: A2 }        IC_gcell_route_ALL IC_hsrules_ALL IC_Inspector_ALL \0 L3 `  m# |0 V3 V* Y1 z/ t
        IC_InspectorEngr IC_InspectorEngr_ALL IC_mp_route_ALL \4 h" o4 X5 j' I5 R7 `% O
        IC_power_route_ALL IDF_Bi_Directional_Interface \
7 ?9 k9 x) J* V+ _2 ]) k* m8 Y. X        iges_electrical intrgloss Intrica_powerplane_builder intrroute \; a* E4 R) |* v  X+ G, L4 p) D9 h
        intrsignoise IPB_4SUPUC_ALL IPB_USUPUC_ALL ipc_in ipc_out \( I) b9 [$ s+ m0 b: t& \
        IPlaceBase_ALL Layout LayoutEE LayoutEngEd LayoutPlus \
% ^2 S- J  c* K- |6 x  o        LEAPFROG-BV LEAPFROG-CV LEAPFROG-SLAVE LEAPFROG-SV \
& e9 ^* E0 J% Q: K1 l  Z7 {- {& n        LEAPFROG-SYS LID11 LINEAR_LIB LSE lwb MAG_LIB MASTERTAG mdin \7 T4 W1 s% s( S/ E- p2 R
        mdout mdtoac mdtocv"+ Q- s9 L& J$ i3 b) E
PACKAGE EFA-CDS-05 cdslmd 2019.12 709080B1B225997E86A8 \
. c7 w: g* ~' h, q3 `        COMPONENTS="MIXAD_LIB modelIntegrity multiwire \
3 C5 T6 X% o, d  I! p        NC_VHDL_Simulator NC_SystemC_Simulator Nihongoconcept \3 F1 _$ d9 p( p
        OpenModeler OpenModeler_SFI OpenModeler_SWIFT OpenSim \
: a/ j4 t% X1 p- x' Q! Z5 `        OpenWaves Optimizer OptimizerAA OrCAD OrCAD_Capture_CIS_option \
+ x3 C0 U, _$ t% d) }9 Y( q; r       
0 v# z; M8 T5 ]- g! X" Y        PB_USUPUC_ALL PCB_design_expert PCB_design_studio PCB_designer \6 L/ r/ F" O* r+ [' K
        pcb_editor pcb_interactive PCB_librarian_expert pcb_prep \7 n1 g6 p2 x  t( M* h6 G: Q6 l! p8 [
        PCB_studio_variants pcomp PE_Librarian PlaceBase_ALL placement \
' H) K6 B& R6 K7 v  D, K        PlaceOrIPlace_ALL plotVersa PO1100 PO1110 PO1300 PO1310 PO1320 \  Q# _( o7 ^+ M7 `' f. Q+ l
        PO1330"
! O7 ]% T3 l5 M* G" t) v( oPACKAGE EFA-CDS-06 cdslmd 2019.12 4030F0D1DDB23CB51B53 \
8 x6 M( a0 }! e$ ^6 f7 }, d4 z        COMPONENTS="PO1340 PO1400 PO1410 PO1420 PowerIntegrity \
! j) u1 H+ E& T: x( V9 V5 ^- M        PPRoute_ALL Prevail_Board_Designer Prevail_Designer PS2010 \# X, m/ o. U, e5 A' [
        PS2200 PS3010 PSpice PSpiceAA PSpiceAAOptimizer PSpiceAAStudio \2 a; w7 K( O, Q) b1 X
        PSpiceAD PSpiceADAA PSpiceADStudio PSpiceBasics PSpiceStudio \6 b/ [! D/ P3 ~+ H4 s* A
        ptc_in ptc_out PWM_LIB PX3500 PX3710 PX3910 quanticout \/ G) D  x+ {! E1 f4 {8 U3 C- T
        RapidPART rapidsim RB_4SUPUC_ALL RB_6SUPUC RB_6SUPUC_ALL \. I" ^+ x4 @& {# s. e
        RB_USUPUC RB_USUPUC_ALL realchiplm RouteADV RouteADV_ALL \9 v# e: m/ [1 Q" G# @; `
        RouteBase RouteBase_ALL RouteDF"
( ?& [2 V$ R  ~- b% IPACKAGE EFA-CDS-07 cdslmd 2019.12 40F0106176E4BBB2D3D1 \
6 `" T8 W# c! B6 _8 L# @        COMPONENTS="RouteDFM_ALL RouteFST RouteFST_ALL RouteHYB_ALL \
; Z8 s+ M* |; `4 A        RouteMin_ALL RouteMVIA_ALL RouteOrEdit_ALL rt sdrc_in sdrc_out \( X: L, h2 R8 G, ]! r
        shapefill signal_explorer signoise SigNoise_Float SigNoiseCS \/ Z2 p6 H: c( O$ ]# }/ q' d
        SigNoiseEngineer SigNoiseStdDigLib Sigxp sigxp_explorer \
. J$ D: I& i- X5 J! J7 m. p5 w        Sigxp_tier Sigxp_tier_EXPERT SimVision skillDev SPECCTRA_256U \; o6 y6 o# a7 c" f9 y- Q
        SPECCTRA_6U SPECCTRA_ADV SPECCTRA_APD SPECCTRA_autoroute \
3 A; e, C; q1 _. H: p0 p9 N! P        SPECCTRA_autoroute_ALL SPECCTRA_autorouteEngr \
& u" b$ r' S( p  C, |        SPECCTRA_designer SPECCTRA_designer_ALL SPECCTRA_designerEngr \8 g8 h1 ?8 O+ ?" ^4 _, a) u
        SPECCTRA_DFM SPECCTRA_expert SPECCTRA_expert_ALL \) l- i" D) |9 R% j2 D2 ^) Z- A
        SPECCTRA_expert_system SPECCTRA_expert_system_ALL \2 O7 ~' {: w! o2 y8 p7 _# a
        SPECCTRA_expert_systemEngr SPECCTRA_expertEngr"; E. q: p) v5 U+ Y
PACKAGE EFA-CDS-08 cdslmd 2019.12 4010E001C03C574EA29E \/ w& w% c" {: L+ F! b+ `
        COMPONENTS="SPECCTRA_HP SPECCTRA_PCB SPECCTRA_PCB_ALL \
' u8 k; A; R! l' z        SPECCTRA_PCBEngr SPECCTRA_performance SPECCTRA_performance_ALL \, n; i2 x4 u1 W2 F
        SPECCTRA_QE SPECCTRA_VT SPECCTRAQuest SPECCTRAQuest_expert \
/ y3 k9 p% M/ l  u: V6 V        SPECCTRAQuest_Planner SPECCTRAQuest_SI_expert \
% h$ q- ~; X: O        SPECCTRAQuest_signal_expert SPECCTRAQuest_signal_explorer \
& l- T% |. g; q        SQ_Digital_Logic_SI_Lib SQ_FPGA_SI_Lib SQ_Memory_SI_Lib \9 M8 J. k7 S  K
        SQ_Microprocessor_SI_Lib stream_in stream_out StudioPSpiceAD \
; T" ^- t! \) w7 g: p1 j6 K        swap SWIFT sx Synlink_Interface Team_EFA tscr tune tw01 tw02 \$ l+ A# V9 q) A% B) i
        UET ULMdelta ULMecho ULMhotel ULMindia ULMjuliette ULMmike \
. S, O1 z: ^/ q* l8 q4 D, p5 e        Unison_SPECCTRA_4U VB_4SUPUC_ALL VB_6SUPUC"
( @: @( a) }8 P0 G- t0 T+ fPACKAGE EFA-CDS-09 cdslmd 2019.12 B0800091DEDE2463C4D0 \7 @% d) L1 B+ z  @0 ?
        COMPONENTS="VB_6SUPUC_ALL VB_USUPUC VB_USUPUC_ALL \3 u+ W) d8 f8 Q& [$ J. @1 E3 X# o( n
        VERILOG-SLAVE VERILOG-XL vgen VHDLLink viable ViewBase \
$ e& M2 `' y7 O        ViewBase_ALL ViewBaseEngr ViewBaseEngr_ALL \: E3 N$ _0 t: [5 z0 [, d- r9 H
        Virtuoso_custom_router_ALL Virtuoso_custom_routerEngr \
. A% {" y4 i' A; S8 j        visula_in vloglink VXL-LMC-HW-IF VXL-TURBO VXL-VCW VXL-VET \( r* h* c5 Q1 u+ Q, A
        VXL-VLS VXL-VRA WinActel WinAltera WinAMDMACH WinAtmel \/ o+ F, h  F; e# c
        WinAutoRouteU WinCapture WinCaptureCIS WinDesignLab WinDevEqu \
2 z: W" j+ e2 z) z2 B1 J2 t$ c3 l: Q        WinEditRouteU WinExpress WinExpressPlus WinLayout WinLayoutEE \
8 A% Z2 F9 r" F6 ~$ k1 l        WinLayoutPlus WinMACHfiveVP WinMicroSim WinMinc"6 R: U% D$ W% u$ k8 ?- p& X% \
PACKAGE EFA-CDS-10 cdslmd 2019.12 D0303001C3A577CFA14E \
3 y+ f, V4 t$ _6 i0 z        COMPONENTS="WinOptimizer WinOrCAD WinParts WinPCBoards WinPLD \8 d* x& t3 c7 ?
        WinPLSyn WinPLSynPart WinProbe WinPSpice WinPSpiceAD WinStmEd \
/ c! d5 c8 k, I6 F; W1 b' r* U) l* ^        WinXilinx"( t' S7 x- S3 Q6 c& k) F; v) ^
#
& n/ V+ w5 e, z9 W/ }) ^# --------------------------------------------------------------------
3 g6 G. I2 Y- {( b8 j8 b5 Q8 l! U' N#
, q8 Z5 A2 D. R. y! M0 GINCREMENT EFA-CDS-01 cdslmd 2019.12 23-dec-2019 uncounted AD8107572717EEA50D97 "" ANY6 w, }  V/ s& g1 E( I
INCREMENT EFA-CDS-02 cdslmd 2019.12 23-dec-2019 uncounted AD9107572C17EEA50E92 "" ANY9 N& w( x8 h+ }$ C  ?  E" k
INCREMENT EFA-CDS-03 cdslmd 2019.12 23-dec-2019 uncounted BDA107572D17EEA51F91 "" ANY
4 M! W. b& P  `INCREMENT EFA-CDS-04 cdslmd 2019.12 23-dec-2019 uncounted BDB107572A17EEA52094 "" ANY/ ^1 ?* A2 l6 b& v- c" b+ }" a
INCREMENT EFA-CDS-05 cdslmd 2019.12 23-dec-2019 uncounted BDC107572B17EEA52193 "" ANY/ ^7 D: R- ^( W* z) G' g0 L' q
INCREMENT EFA-CDS-06 cdslmd 2019.12 23-dec-2019 uncounted BDD107572017EEA5229E "" ANY  k" h1 q6 Q# v$ K
INCREMENT EFA-CDS-07 cdslmd 2019.12 23-dec-2019 uncounted BDE107572117EEA5239D "" ANY
7 n% `  Y" D0 TINCREMENT EFA-CDS-08 cdslmd 2019.12 23-dec-2019 uncounted ADF107572E17EEA51490 "" ANY3 l6 p- x' ]" I8 P3 j
INCREMENT EFA-CDS-09 cdslmd 2019.12 23-dec-2019 uncounted BD0107572F17EEA5158F "" ANY
. Q5 T2 D' A9 I) \) e( ^$ ?" ^INCREMENT EFA-CDS-10 cdslmd 2019.12 23-dec-2019 uncounted AD810787261AEEA50D98 "" ANY0 j0 e9 p( R, d
#! c# r2 A+ v4 l& b0 ?1 ?
# --------------------------------------------------------------------
0 y" T5 y2 \; n! g#
; I: g- |3 r9 e# S' f8 I! u, m
2 w5 Y" E) m6 C, M& D0 A#
3 `1 q: r- ~7 h  {. a. b#       License generated by Team EFA 2004 Keygen& `0 c) Z, R' k  [9 C4 }

该用户从未签到

4#
发表于 2020-1-6 10:50 | 只看该作者
看License的日期刚好是2019.12 23

该用户从未签到

5#
发表于 2020-1-7 12:11 | 只看该作者
也是16.3精简版没碰到这个问题啊

点评

看你License的日期到期日期是什么时候?  详情 回复 发表于 2020-1-7 18:29

该用户从未签到

6#
发表于 2020-1-7 18:29 | 只看该作者
zg927 发表于 2020-1-7 12:11
. s7 t$ }7 t8 z: P1 T也是16.3精简版没碰到这个问题啊

- P9 W7 U0 v9 F3 I! |" o* |1 M' ~看你License的日期到期日期是什么时候?  F5 Z/ s! t9 m4 g7 [; N2 S" g

* \3 M2 ]1 a1 A' T( W

点评

在哪看日期啊?  详情 回复 发表于 2020-1-9 15:16

该用户从未签到

7#
发表于 2020-1-9 15:16 | 只看该作者
great058 发表于 2020-1-7 18:29
, o/ s2 r, F. p# a3 G3 F看你License的日期到期日期是什么时候?

( n* N3 @3 V) [. J# t3 m在哪看日期啊?* C  u* _# V! i# H

点评

用记事本打开License[/backcolor]  详情 回复 发表于 2020-1-14 09:10

该用户从未签到

8#
发表于 2020-1-14 09:10 | 只看该作者
zg927 发表于 2020-1-9 15:16) L2 [6 Z0 J! x4 x
在哪看日期啊?
, [0 N7 ?9 x5 T2 h/ r9 o6 S& i
用记事本打开License3 @' I. l9 J) z. z

点评

显示都是2010的日期 。。。。。。。。。 INCREMENT WinProbe cdslmd 16.0 31-dec-2010 uncounted \ EDD703435562B757EC3C VENDOR_STRING=JERM HOSTID=ANY \ ISSUER=Ghost/ZWT SN=2006-08-27T00:00:00:123  详情 回复 发表于 2020-1-14 16:21

该用户从未签到

9#
发表于 2020-1-14 16:21 | 只看该作者
great058 发表于 2020-1-14 09:10
+ ?7 J  ?' V; g5 F$ v用记事本打开License
7 [; t9 G# Z" U7 H; _2 |8 b
显示都是2010的日期; z5 p) ^) e# i2 V
。。。。。。。。。0 ~  W( d1 H8 ]# N9 X, X

3 t2 d% l7 x' H9 m% ~5 \$ DINCREMENT WinProbe cdslmd 16.0 31-dec-2010 uncounted \7 h. i- c0 T1 W, C: @0 c* {2 K
        EDD703435562B757EC3C VENDOR_STRING=JERM HOSTID=ANY \
) r; z6 S+ W  R+ |        ISSUER=Ghost/ZWT SN=2006-08-27T00:00:00:123 TS_OK \
& ^1 ?9 @) r2 \; k, D9 H/ p        SIGN2=EDD703435562B757EC3C6 H4 X1 _; a5 w" G+ G6 ]# A& N
INCREMENT WinDevEqu cdslmd 16.0 31-dec-2010 uncounted \
$ K2 N; d( C9 Q8 B! y        6DD773933F6DB5A7595B VENDOR_STRING=JERM HOSTID=ANY \
$ l# N* F8 y+ Z  O( y' Y8 O& i        ISSUER=Ghost/ZWT SN=2006-08-27T00:00:00:123 TS_OK \
4 {- Z% d" H8 q        SIGN2=6DD773933F6DB5A7595B
5 D& E' n( ]& J. y' SINCREMENT WinDesignLab cdslmd 16.0 31-dec-2010 uncounted \
0 f9 @+ r2 f4 W6 k7 X0 P' p: J- G. m        5D8733638BE1778ECB36 VENDOR_STRING=JERM HOSTID=ANY \
" v  I5 M7 J, q! i  O3 E        ISSUER=Ghost/ZWT SN=2006-08-27T00:00:00:123 TS_OK \
3 p5 h1 F& e: M% }        SIGN2=5D8733638BE1778ECB365 J2 r1 t' D8 x" t; [
INCREMENT WinMicroSim cdslmd 16.0 31-dec-2010 uncounted \2 f' s- Z( ^2 ^) p9 q
        3D7783A3AA631F31D9CD VENDOR_STRING=J:PERM HOSTID=ANY \) e$ P, w$ Z2 ?8 E3 _0 C* j; w/ n
        ISSUER=Ghost/ZWT SN=2006-08-27T00:00:00:123 TS_OK \
: ?! I1 H. c5 D8 `  L4 G: f        SIGN2=3D7783A3AA631F31D9CD
6 \5 W( P! }3 `7 F+ a# Q4 z0 v# l3 B0 S
% b7 v7 a. y9 V; a9 x% g8 q. U
。。。。。。。。。。
# N0 M& j7 q, Z6 w4 P7 \: ~3 i4 O' F# y' B

该用户从未签到

10#
 楼主| 发表于 2020-1-26 21:54 | 只看该作者
下载个cracklock软件,就可以使用了,可以百度下这个软件的使用教程
您需要登录后才可以回帖 登录 | 注册

本版积分规则

关闭

推荐内容上一条 /1 下一条

EDA365公众号

关于我们|手机版|EDA365电子论坛网 ( 粤ICP备18020198号-1 )

GMT+8, 2025-9-10 13:33 , Processed in 0.156250 second(s), 30 queries , Gzip On.

深圳市墨知创新科技有限公司

地址:深圳市南山区科技生态园2栋A座805 电话:19926409050

快速回复 返回顶部 返回列表