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装完还是显示052 # L! }' \, b. b ^ g3 m
Fixed CCRs: SPB 17.2 HF053
J! J% k1 j; E. r. h& U03-01-2019
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7 i( |! D. V2 W1 P* [# N8 iCCRID Product ProductLevel2 Title
6 V/ X9 {! z' Y2 a========================================================================================================================================================) b/ Q) @% J- O
2035766 ADW DSN_MIGRATION EDM release 17.2-2016: design migration UI is cut off on right
+ \* k7 ~9 `! d* z5 M8 s/ ?# T, N2044872 ADW PART_BROWSER Component Browser: Only one PTF file read for multiple PTF files under Part Table all referenced in master.tag
: _' m2 a3 M2 f5 D0 ^8 |) d* C2025147 ADW TDO-SHAREPOIN Design Management stops responding when a board file is deleted and then checked in with the same name
7 V4 _1 t1 Q" T* y$ X2025201 ADW TDO-SHAREPOIN Getting error message (SPDWSD-20) when logging in to team design
0 y& T$ |/ e7 |0 B8 l2052046 ADW TDO-SHAREPOIN Joining projects is downloading 0-byte files due to SSL error) Q/ ^6 _, T- T5 N# l5 `+ `
2056694 ADW TDO-SHAREPOIN Design Management stops responding on checking in an object with the same name as a previously deleted object' J) H3 S4 L! o( P' l$ i" Z7 |
2047512 ALLEGRO_EDITOR 3D_CANVAS Mechanical components do not move when bending in 3D Viewer& K1 V3 ~6 V7 y( o9 q
2048086 ALLEGRO_EDITOR 3D_CANVAS Wirebonds are not linked to diepad when component is embedded body down
9 S7 J- L) F' T& O+ V7 V2051277 ALLEGRO_EDITOR 3D_CANVAS 3D View Vias are Offset from Board in Z direction
# J0 [7 a. F) V* |) Q) k {2054327 ALLEGRO_EDITOR 3D_CANVAS 3D Canvas error: All bend operations are disabled due to licensing and/or DLL installation
- v- n: X% G0 Y+ C2056547 ALLEGRO_EDITOR 3D_CANVAS 3D model not shown for component with STEP file assigned h9 h5 p$ P! W# l; A
2044980 ALLEGRO_EDITOR ARTWORK 'Import - Artwork': PCB Editor stops responding and no artworks are loaded
7 [" @# D. [0 H5 t- h/ `6 d2061203 ALLEGRO_EDITOR CROSS_SECTION Importing cross-section from single stackup to multiple stackup adding additional layers to the primary zone
/ d7 ]8 [6 r F5 v# n$ L1826533 ALLEGRO_EDITOR DATABASE Dyn_Thermal_Con_Type not behaving as defined in Symbol Editor after placing on PCB file.! i4 K1 l3 F+ E. V; u4 n' d, z6 ?
1857282 ALLEGRO_EDITOR DATABASE PCB Editor slow when Manhattan and Path length tooltip enabled in datatip customization
# g1 v% N- L' _- i% n' r2052767 ALLEGRO_EDITOR DATABASE Allegro PCB Editor crashes on editing padstack
$ Z3 h9 J3 r. k1825692 ALLEGRO_EDITOR DRAFTING Dimension line text moved by Update Symbols. S: g' ?2 N/ c. C( X
1874814 ALLEGRO_EDITOR DRAFTING 'Connect Lines' does not merge overlapping lines' T* M/ {( l& t C' q4 Z+ z Y+ M
1874935 ALLEGRO_EDITOR DRAFTING Angular dimension text has extra spaces added before the degree symbol.
9 E9 v# s" |2 O. r1882597 ALLEGRO_EDITOR DRAFTING 'Trim Segment' should allow trimming for all intersecting segment types5 B7 b) x0 x ]3 x/ h) t8 v
2052315 ALLEGRO_EDITOR DRC_CONSTR DRC (pad-shape) incorrect when both pad and drill are offset from pad origin.
; w7 p, P7 b. S4 M/ r2040603 ALLEGRO_EDITOR EDIT_SHAPE Shape is not updating correctly after the 'move' command6 t" l+ D- Z, L) R7 a" N, Z2 a( T
2050177 ALLEGRO_EDITOR INTERACTIV Letters need to remain aligned and uniform after performing Boolean ANDNOT operation; `3 ^0 O ]: v: c2 G9 G% I5 @
2052586 ALLEGRO_EDITOR IPC IPC356 showing shorts and disconnects for chip-on-board design+ ~+ x9 O/ y! l; \
2044350 ALLEGRO_EDITOR MANUFACT Cross Section table showing multiple decimal digits for the Tolerance column' T) l! p$ M& ^* b. s8 j
2051150 ALLEGRO_EDITOR NC Counterbore/Countersink holes not being shown in the NC legend table.. \' R& F: B% Q& U: V
2058199 ALLEGRO_EDITOR NC 'Manufacture - NC - Drill Legend' does not populate the CounterBore/CounterSink row values in the Drill Chart table
" j. R" C4 W, ?$ Y4 a4 C7 \1 f2061809 ALLEGRO_EDITOR NC Counter bore NC Legend does not show any data' x$ J6 Y6 E5 C; s1 n7 s& u
2063477 ALLEGRO_EDITOR NC Counter bore NC Legend does not show its value+ C2 {- u& z; ~ d
2033849 ALLEGRO_EDITOR PLACEMENT PCB Editor stops responding when removing a plane that the Place Replicate command added. F1 Y1 P3 Z1 `* c- f; t" l
2037509 ALLEGRO_EDITOR PLACEMENT Move or Rotate or Mirror of a module/group makes PCB Editor to crash with no .SAV file created8 |; l8 ~, v" c- Q$ z
2047480 ALLEGRO_EDITOR SCHEM_FTB Importing netlist using Capture-CM flow in PCB Editor is crashing netrev
" x% R" h8 ?* m8 i2046276 ALLEGRO_EDITOR SHAPE Add notch is not snapping to the grid point
( C; N% I0 e( z3 U: B# q" {2047572 ALLEGRO_EDITOR SHAPE Voiding elements on static shape do not void adjacent layer keep-outs and PCB Editor stops responding
2 I2 \3 T, C, {" F$ k9 \ F2048483 ALLEGRO_EDITOR SHAPE Shapes not getting updated post backdrill update
/ Y. i# p' h* h- U5 J+ g( Z2050120 ALLEGRO_EDITOR SHAPE Dynamic fill is flooding over other etch shapes within a symbol.
% `$ w% M+ X4 R0 g7 y2 k1 @/ Q$ [2058017 ALLEGRO_EDITOR SHAPE Shape not voiding correctly when fillets are present
& ^$ w# E$ Z* x$ J# q* s/ j9 @ k2010569 ALLEGRO_EDITOR SKILL Using SKILL to add 'nil' to a DRC object following a 'println' statement crashes PCB Editor in hotfix 048.5 s4 O7 O9 y; Y, M( G ]
2055055 ALLEGRO_EDITOR SKILL Using SKILL to add a 'nil' property value to a String causes Allegro PCB Editor to crash
) v. u/ k! V* Y' j1961689 ALLEGRO_EDITOR SYMBOL Pin Numbers are moved from center with Pin Rotation when adding pins to Footprint
9 P9 a% r5 b. j2034949 ALLEGRO_EDITOR SYMBOL Angular dimension from DRA not created in PCB3 N, P( x8 ~$ s
2046242 ALLEGRO_EDITOR UI_GENERAL Searching User Preference Summary results in crash
4 F$ \+ @" l' A2 v8 _' a2053496 ALLEGRO_EDITOR UI_GENERAL Confirmation dialog box is behind canvas
, p5 i f* b% ` e! Y9 E8 {' f2063423 ALLEGRO_EDITOR UI_GENERAL Blocking dialog popped up by axlUIPrompt() goes behind the canvas and is hidden: M2 e/ g( @7 L+ l
1886781 ALLEGRO_VIEWER OTHER Opening Color192 in Allegro Free Viewer causes it to crash/ d, Q4 Q$ [- e* j7 y% T# M# d
1699433 APD EDIT_ETCH Field solver runs when not expected
" |" G6 d% o, o0 L& O% U1937159 APD EDIT_ETCH Routing clines takes long time3 |, P: R! C4 x/ |# ?1 [
2050863 APD SHAPE Taper voiding process is different in Within the region/Out of Region
h) R7 S5 L+ g2047391 CAPTURE PART_EDITOR Pin type cannot be changed in hotfix 051. ]+ [3 T7 o2 r$ _3 w
2049161 CAP_EDIF IMPORT Fatal error 'cannot determine grid' when converting third-party design to Capture* E9 g# X4 U- M G9 a/ ~- V
2053578 CONCEPT_HDL CONSTRAINT_MG Values specified for custom properties are not preserved
; Z& I; ?( W. [9 n0 O4 _6 G8 O2047583 CONCEPT_HDL COPY_PROJECT Design Entry HDL crashing when trying to open page 52 of copied project
( `% w8 o9 I) w F6 H% _2036239 CONCEPT_HDL CORE When cutting/pasting, multiple error pop-ups appear for the same notification
& S7 O7 |$ G6 T$ x2037572 CONCEPT_HDL CORE Warning (SPCOCD-578): Soft VOLTAGE property found is misleading and should be auto resolved when closing CM) x e9 }% S$ G4 z4 M/ l0 X
2037578 CONCEPT_HDL CORE VOLTAGE property gets deleted after copying it from a non-synchronized source! I3 a- @/ Y! Z! }7 l% [9 G
2046958 CONCEPT_HDL CORE Moving block pins from symbol right to left places pin names outside the symbol
( R9 n% z9 d; Z2 \+ W9 M4 m; s. o) N2032480 CONSTRAINT_MGR CONCEPT_HDL Incorrect matchgroups created when working with multiple level nested hierarchical blocks8 M9 a) ]! ~& `8 }
2045274 CONSTRAINT_MGR CONCEPT_HDL Running SKILL script or navigating pages in the hierarchy viewer crashes schematic editor
! |8 b5 D1 b; _2046765 SIP_LAYOUT DIE_ABSTRACT_ SiP Layout 'dump libraries' crashes when exporting library6 l( X% m$ k: ~5 |0 s
2067970 SIP_LAYOUT DIE_ABSTRACT_ SiP Layout cannot dump libraries, viewlog is empty: s, p, Q B$ z& G& i
1981749 SYSTEM_CAPTURE ARCHIVER System Capture: Archiving a design from the Tcl command window results in error% V2 t6 o5 Y5 `, M% p1 b1 ?
1968437 SYSTEM_CAPTURE ASSIGN_SIGNAL Net name pasted in lower-case though UPPERCASE INPUT is enabled
5 X* i3 h( q2 E; [0 X1983063 SYSTEM_CAPTURE AUTOSHAPES Auto Shapes are being shown as part of components4 q, w4 [$ c; i( o% M4 S! z5 g
1968463 SYSTEM_CAPTURE CANVAS_EDIT System Capture should not allow illegal characters to be entered for net names% T0 w( Y5 l. k- [
2006593 SYSTEM_CAPTURE CANVAS_EDIT Asterisk in a search string is not treated as a wildcard character
) f8 `" h. M5 e* I+ r6 Q1721863 SYSTEM_CAPTURE CONNECTIVITY_ Net Names move to random locations when the components are moved around the canvas
% g5 q, j! m" f9 m/ o$ E* K1960130 SYSTEM_CAPTURE CONNECTIVITY_ Disconnected nets when using the mirror option1 O( j7 e3 G9 B) Q% W2 m
1985029 SYSTEM_CAPTURE EDIT_OPERATIO Net aliases do not drag with circuit, they appear to move after the circuit is dropped8 S! G ?/ g$ Z f r
1895142 SYSTEM_CAPTURE EXPORT_PCB System Capture reports incorrect unsaved changes when closed after running export physical, F) b S+ g- F
1628596 SYSTEM_CAPTURE FIND_REPLACE Alias issue in Find: Results do not show the resolved physical net names0 ?$ w% k5 n& C! e- m# w- n0 Z
1988297 SYSTEM_CAPTURE FIND_REPLACE Edit > Find and Replace does not replace a net with an existing net on the canvas. K, F" l6 J% S
1843885 SYSTEM_CAPTURE FORMAT_OBJECT Renaming a net causes it to lose custom color assignment" d6 W. ?; {5 n- o8 q3 l/ l
1969308 SYSTEM_CAPTURE FORMAT_OBJECT System Capture: Clicking arrows to increase/decrease font size does not work correctly when clicked fast, T2 F8 Q9 z* j% q/ y4 D( P5 u8 j
1990060 SYSTEM_CAPTURE FORMAT_OBJECT Bold, italics, and underline formats not visually shown on all selected objects concurrently& z* v9 z" o0 e6 H/ i: C6 J5 V
1993208 SYSTEM_CAPTURE FORMAT_OBJECT Setting font prior to placing text does not work, pop-up does not work, and bucket results in scrolling page+ W+ e; \6 y R( s$ S3 A
1981775 SYSTEM_CAPTURE IMPORT_PCB Import Physical takes a long time on some designs to launch the UI! a! Y# F* V7 h0 @6 v) G" | ?
1982320 SYSTEM_CAPTURE IMPORT_PCB In the B2F flow none of the *view files are created
/ w/ k7 q9 B6 o0 ]" Z+ ]1 e2010996 SYSTEM_CAPTURE INSERT_PICTUR Image in title block is at a wrong location in design: correctly placed in library) z8 p. I( A; f3 [: e) I, D" O
1967614 SYSTEM_CAPTURE MISCELLANEOUS Dragging a circuit with net aliases does not move the net aliases with it- |+ `5 S9 Z* i) C" M: l ~
1980999 SYSTEM_CAPTURE NEW_PROJECT System Capture stops working with message regarding Part Manager initialization for a design based on DE-HDL
+ h4 q; Z% j7 w! l& Z0 I/ M" Z4 Z1973437 SYSTEM_CAPTURE OPEN_CLOSE_PR Opening a design crashes System Capture! P" s- `9 r' L: }7 ]5 _4 Z
1986566 SYSTEM_CAPTURE OPEN_CLOSE_PR System Captures stops responding on opening project, cleaning project displays project already open message
2 r' \$ @( k. L2 }1993093 SYSTEM_CAPTURE OPEN_CLOSE_PR Add option to override the lock file similar to Allegro PCB Editor
) m! g k/ M( z) z" p. C# E2042360 SYSTEM_CAPTURE OPEN_CLOSE_PR System Capture will not open nor gives error message when previous lock file present inside the logic folder
% q; I4 S* Z3 I/ |) ]1992247 SYSTEM_CAPTURE PART_MANAGER Part Manager displays message for undo and redo stack even after specifying not to show message
- b5 Y: P* ?6 e; I7 Q2048000 SYSTEM_CAPTURE PERFORMANCE Performance issue when instantiating and moving a component
5 `" n" n! D" ~& @% P9 B. p1892120 SYSTEM_CAPTURE PROPERTY_EDIT Some parts missing reference designators and some have two properties, RefDes and REFDES) s7 D' m4 k7 B7 @ K9 g3 l- r M' n
1970009 SYSTEM_CAPTURE PROPERTY_EDIT System Capture: Right-clicking RefDes with conflict in 'Edit Properties' shows the Hyperlink option
2 ?' @3 P9 e! u1 \) H2042707 SYSTEM_CAPTURE VARIANT_MANAG variant.lst file under 'physical' folder not updated when closing Variant Editor
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发表于 2019-4-8 19:46
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