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装完还是显示052
9 S" _" m9 X; d2 [% |- t0 I5 NFixed CCRs: SPB 17.2 HF053, Y, H- [; _$ F0 ? O1 P- }
03-01-2019; _* k) }* X- Q" Z/ `) }2 s. V
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CCRID Product ProductLevel2 Title
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2035766 ADW DSN_MIGRATION EDM release 17.2-2016: design migration UI is cut off on right
/ |' }$ {4 Y) Q2044872 ADW PART_BROWSER Component Browser: Only one PTF file read for multiple PTF files under Part Table all referenced in master.tag
. n" C+ B: |, h) n; K1 R! g: l2025147 ADW TDO-SHAREPOIN Design Management stops responding when a board file is deleted and then checked in with the same name1 E0 e7 K' S. J# x3 h* Z
2025201 ADW TDO-SHAREPOIN Getting error message (SPDWSD-20) when logging in to team design" j D6 W4 C. S: g7 T
2052046 ADW TDO-SHAREPOIN Joining projects is downloading 0-byte files due to SSL error4 N- P3 |, p$ Z5 [2 K" Q
2056694 ADW TDO-SHAREPOIN Design Management stops responding on checking in an object with the same name as a previously deleted object+ v8 G1 C4 q$ Q$ J; A" s" t
2047512 ALLEGRO_EDITOR 3D_CANVAS Mechanical components do not move when bending in 3D Viewer7 |" @: ?/ C: H4 u! j; J# d
2048086 ALLEGRO_EDITOR 3D_CANVAS Wirebonds are not linked to diepad when component is embedded body down
3 p2 d7 V6 l9 f) z Y) B+ H( s5 z& k2051277 ALLEGRO_EDITOR 3D_CANVAS 3D View Vias are Offset from Board in Z direction+ |. ~0 o6 U/ y( |/ w3 L6 \
2054327 ALLEGRO_EDITOR 3D_CANVAS 3D Canvas error: All bend operations are disabled due to licensing and/or DLL installation
8 B8 ]3 y7 Q; S' S! J% L2056547 ALLEGRO_EDITOR 3D_CANVAS 3D model not shown for component with STEP file assigned
4 x- U8 [: K7 i- M2044980 ALLEGRO_EDITOR ARTWORK 'Import - Artwork': PCB Editor stops responding and no artworks are loaded
1 J5 m( t/ D; E0 N+ s5 B2061203 ALLEGRO_EDITOR CROSS_SECTION Importing cross-section from single stackup to multiple stackup adding additional layers to the primary zone
_ R6 T |. K( V2 f+ O6 c7 u) d1826533 ALLEGRO_EDITOR DATABASE Dyn_Thermal_Con_Type not behaving as defined in Symbol Editor after placing on PCB file.# H, y* m! R2 o
1857282 ALLEGRO_EDITOR DATABASE PCB Editor slow when Manhattan and Path length tooltip enabled in datatip customization% x+ W" E1 c, g& I: |/ X0 j
2052767 ALLEGRO_EDITOR DATABASE Allegro PCB Editor crashes on editing padstack) f8 K$ G5 d2 n3 q; I
1825692 ALLEGRO_EDITOR DRAFTING Dimension line text moved by Update Symbols' ?& q- {$ c1 b( q- |
1874814 ALLEGRO_EDITOR DRAFTING 'Connect Lines' does not merge overlapping lines( {0 K) V+ R" L3 o5 @$ v, s2 h
1874935 ALLEGRO_EDITOR DRAFTING Angular dimension text has extra spaces added before the degree symbol.- }$ H O0 C8 n. `& a* d$ v, ]# N
1882597 ALLEGRO_EDITOR DRAFTING 'Trim Segment' should allow trimming for all intersecting segment types
: L8 S: U( P; d* A$ E2052315 ALLEGRO_EDITOR DRC_CONSTR DRC (pad-shape) incorrect when both pad and drill are offset from pad origin.
: e! x: k i, I2040603 ALLEGRO_EDITOR EDIT_SHAPE Shape is not updating correctly after the 'move' command
) v5 N% U! H j1 Z$ \; U" c7 `2050177 ALLEGRO_EDITOR INTERACTIV Letters need to remain aligned and uniform after performing Boolean ANDNOT operation
3 E6 c. ^* ]8 C4 {# p) C3 {2052586 ALLEGRO_EDITOR IPC IPC356 showing shorts and disconnects for chip-on-board design. w! H! n% U/ ~& p* {
2044350 ALLEGRO_EDITOR MANUFACT Cross Section table showing multiple decimal digits for the Tolerance column1 l4 c/ [) w7 E7 j
2051150 ALLEGRO_EDITOR NC Counterbore/Countersink holes not being shown in the NC legend table.
$ A. T9 g& W! t7 K* o [/ G2058199 ALLEGRO_EDITOR NC 'Manufacture - NC - Drill Legend' does not populate the CounterBore/CounterSink row values in the Drill Chart table
. _" H% A" Q) L# E1 Q: Z& ~2 F2061809 ALLEGRO_EDITOR NC Counter bore NC Legend does not show any data) d5 h& t) l8 h" X
2063477 ALLEGRO_EDITOR NC Counter bore NC Legend does not show its value3 V; p' d6 u3 O) U
2033849 ALLEGRO_EDITOR PLACEMENT PCB Editor stops responding when removing a plane that the Place Replicate command added
( T# R5 ?1 ]# L J0 u9 F2037509 ALLEGRO_EDITOR PLACEMENT Move or Rotate or Mirror of a module/group makes PCB Editor to crash with no .SAV file created9 Y6 s$ p2 R- n8 ^
2047480 ALLEGRO_EDITOR SCHEM_FTB Importing netlist using Capture-CM flow in PCB Editor is crashing netrev X% Q* o1 E# ], k- R
2046276 ALLEGRO_EDITOR SHAPE Add notch is not snapping to the grid point
6 d& s! H' Z* Q* R$ K2047572 ALLEGRO_EDITOR SHAPE Voiding elements on static shape do not void adjacent layer keep-outs and PCB Editor stops responding& n! ]% v$ |: A c: O6 j' K. U7 {- P
2048483 ALLEGRO_EDITOR SHAPE Shapes not getting updated post backdrill update% E8 e4 {# C( s5 ?
2050120 ALLEGRO_EDITOR SHAPE Dynamic fill is flooding over other etch shapes within a symbol.
( _" h, `# H8 a. u6 l2058017 ALLEGRO_EDITOR SHAPE Shape not voiding correctly when fillets are present/ D1 s/ J( E" C7 W8 Q- B3 B/ n
2010569 ALLEGRO_EDITOR SKILL Using SKILL to add 'nil' to a DRC object following a 'println' statement crashes PCB Editor in hotfix 048.
* s; W3 ~7 c6 t1 V2055055 ALLEGRO_EDITOR SKILL Using SKILL to add a 'nil' property value to a String causes Allegro PCB Editor to crash6 [6 O- B; y4 x* d# d, G0 o$ L
1961689 ALLEGRO_EDITOR SYMBOL Pin Numbers are moved from center with Pin Rotation when adding pins to Footprint4 H0 ]0 w) }+ ?5 y! G6 E
2034949 ALLEGRO_EDITOR SYMBOL Angular dimension from DRA not created in PCB4 G5 Q( z* U) f( ~$ O4 b- w6 c' X
2046242 ALLEGRO_EDITOR UI_GENERAL Searching User Preference Summary results in crash, \ |/ \( E" m$ E
2053496 ALLEGRO_EDITOR UI_GENERAL Confirmation dialog box is behind canvas
8 K8 o' }. K# g% u; r2063423 ALLEGRO_EDITOR UI_GENERAL Blocking dialog popped up by axlUIPrompt() goes behind the canvas and is hidden: O" ?- K+ K& Y7 K* c! z
1886781 ALLEGRO_VIEWER OTHER Opening Color192 in Allegro Free Viewer causes it to crash$ j! y3 q) O5 n
1699433 APD EDIT_ETCH Field solver runs when not expected! N) t+ U) r/ q, X. f6 u' i
1937159 APD EDIT_ETCH Routing clines takes long time6 |0 P. A. A. u( E4 ?
2050863 APD SHAPE Taper voiding process is different in Within the region/Out of Region
" W0 z& `5 ~* S% z2047391 CAPTURE PART_EDITOR Pin type cannot be changed in hotfix 0518 t3 j3 O. D& p; w+ S7 W2 @% Z
2049161 CAP_EDIF IMPORT Fatal error 'cannot determine grid' when converting third-party design to Capture
1 H2 C* [( ]! k, ?- B; V6 v2053578 CONCEPT_HDL CONSTRAINT_MG Values specified for custom properties are not preserved- E. u$ O- L& b2 }. m1 }
2047583 CONCEPT_HDL COPY_PROJECT Design Entry HDL crashing when trying to open page 52 of copied project( Y* a# r( U- h$ n
2036239 CONCEPT_HDL CORE When cutting/pasting, multiple error pop-ups appear for the same notification0 K. M) a u* B0 b q! }6 [- s
2037572 CONCEPT_HDL CORE Warning (SPCOCD-578): Soft VOLTAGE property found is misleading and should be auto resolved when closing CM8 _( f9 X: l& B+ m$ I+ q! `
2037578 CONCEPT_HDL CORE VOLTAGE property gets deleted after copying it from a non-synchronized source
8 ]+ ^) d4 ]& n1 X2046958 CONCEPT_HDL CORE Moving block pins from symbol right to left places pin names outside the symbol* ]' U# q. t% @7 v
2032480 CONSTRAINT_MGR CONCEPT_HDL Incorrect matchgroups created when working with multiple level nested hierarchical blocks; ]3 R( H8 l3 C6 L# b. L7 Q/ }
2045274 CONSTRAINT_MGR CONCEPT_HDL Running SKILL script or navigating pages in the hierarchy viewer crashes schematic editor( R! j7 u7 n7 {* e
2046765 SIP_LAYOUT DIE_ABSTRACT_ SiP Layout 'dump libraries' crashes when exporting library' f0 g3 A5 ~! Q9 _2 j3 @1 z
2067970 SIP_LAYOUT DIE_ABSTRACT_ SiP Layout cannot dump libraries, viewlog is empty
+ |7 Z. u7 [/ H' D: t. e. [& h: g1981749 SYSTEM_CAPTURE ARCHIVER System Capture: Archiving a design from the Tcl command window results in error/ P" |2 N# h& u' }9 s) P) }$ Z
1968437 SYSTEM_CAPTURE ASSIGN_SIGNAL Net name pasted in lower-case though UPPERCASE INPUT is enabled
. L- v( f0 h! n6 {( J) ^+ D1983063 SYSTEM_CAPTURE AUTOSHAPES Auto Shapes are being shown as part of components
3 U% m9 [4 f9 V. p$ b1968463 SYSTEM_CAPTURE CANVAS_EDIT System Capture should not allow illegal characters to be entered for net names
- g% i+ T6 n6 Q5 a2006593 SYSTEM_CAPTURE CANVAS_EDIT Asterisk in a search string is not treated as a wildcard character9 h/ M- m' v) N0 ^# l( [
1721863 SYSTEM_CAPTURE CONNECTIVITY_ Net Names move to random locations when the components are moved around the canvas
9 E5 N# L! U- }' @; Y" g' L1960130 SYSTEM_CAPTURE CONNECTIVITY_ Disconnected nets when using the mirror option2 J/ [# `+ R! n" e$ o
1985029 SYSTEM_CAPTURE EDIT_OPERATIO Net aliases do not drag with circuit, they appear to move after the circuit is dropped
/ o8 b' _/ D) z+ i3 I) k( c6 N1895142 SYSTEM_CAPTURE EXPORT_PCB System Capture reports incorrect unsaved changes when closed after running export physical* d5 a4 @$ e- S" x
1628596 SYSTEM_CAPTURE FIND_REPLACE Alias issue in Find: Results do not show the resolved physical net names* {1 l! U0 H9 Y* C
1988297 SYSTEM_CAPTURE FIND_REPLACE Edit > Find and Replace does not replace a net with an existing net on the canvas
# y3 R$ N7 D E D1843885 SYSTEM_CAPTURE FORMAT_OBJECT Renaming a net causes it to lose custom color assignment
+ }2 t$ w) R' O1969308 SYSTEM_CAPTURE FORMAT_OBJECT System Capture: Clicking arrows to increase/decrease font size does not work correctly when clicked fast
9 ?' k! k1 M/ P: e2 L1 E1990060 SYSTEM_CAPTURE FORMAT_OBJECT Bold, italics, and underline formats not visually shown on all selected objects concurrently
( u4 e) d: p! N" u8 k, _1993208 SYSTEM_CAPTURE FORMAT_OBJECT Setting font prior to placing text does not work, pop-up does not work, and bucket results in scrolling page0 s0 @& t/ w7 A2 R) P
1981775 SYSTEM_CAPTURE IMPORT_PCB Import Physical takes a long time on some designs to launch the UI% A( w4 S8 Y. c4 _
1982320 SYSTEM_CAPTURE IMPORT_PCB In the B2F flow none of the *view files are created) ^ c' G/ f% E$ E9 t/ f
2010996 SYSTEM_CAPTURE INSERT_PICTUR Image in title block is at a wrong location in design: correctly placed in library
- I* O- ]0 |# H, K5 B1967614 SYSTEM_CAPTURE MISCELLANEOUS Dragging a circuit with net aliases does not move the net aliases with it
9 q8 F8 N5 g6 p y5 ^2 t1980999 SYSTEM_CAPTURE NEW_PROJECT System Capture stops working with message regarding Part Manager initialization for a design based on DE-HDL
$ X1 W0 N' l2 d: z1 e4 a$ ?/ \! ]) y1973437 SYSTEM_CAPTURE OPEN_CLOSE_PR Opening a design crashes System Capture0 d/ K$ b9 l' Y0 O
1986566 SYSTEM_CAPTURE OPEN_CLOSE_PR System Captures stops responding on opening project, cleaning project displays project already open message
2 e: u+ y! m8 L ^1993093 SYSTEM_CAPTURE OPEN_CLOSE_PR Add option to override the lock file similar to Allegro PCB Editor6 U5 C7 m( S# {$ v/ B0 m% t! U
2042360 SYSTEM_CAPTURE OPEN_CLOSE_PR System Capture will not open nor gives error message when previous lock file present inside the logic folder
5 [$ j7 S2 }% ?! _7 U, c! Y1992247 SYSTEM_CAPTURE PART_MANAGER Part Manager displays message for undo and redo stack even after specifying not to show message
) M2 c: c" u* {' C( z2048000 SYSTEM_CAPTURE PERFORMANCE Performance issue when instantiating and moving a component* t0 v1 B q! ?
1892120 SYSTEM_CAPTURE PROPERTY_EDIT Some parts missing reference designators and some have two properties, RefDes and REFDES
( q* o/ c# e y. z. N2 ~' k1970009 SYSTEM_CAPTURE PROPERTY_EDIT System Capture: Right-clicking RefDes with conflict in 'Edit Properties' shows the Hyperlink option
: R* @) F; f* q/ W+ n/ j# d2042707 SYSTEM_CAPTURE VARIANT_MANAG variant.lst file under 'physical' folder not updated when closing Variant Editor; F6 L- D% }4 U# W
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发表于 2019-4-8 19:46
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