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装完还是显示052 8 _' }. G J+ A. V; g- U0 Z/ O
Fixed CCRs: SPB 17.2 HF0531 T* N# B7 a9 x* E$ n J! k
03-01-20191 x; }' a9 `8 r7 n
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3 g: {8 y. c. b) P, s3 X2 r: GCCRID Product ProductLevel2 Title- B% G/ @' v* Y( L
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. p0 R* P; U, s2 k2035766 ADW DSN_MIGRATION EDM release 17.2-2016: design migration UI is cut off on right
5 l$ G* u% f' D2044872 ADW PART_BROWSER Component Browser: Only one PTF file read for multiple PTF files under Part Table all referenced in master.tag6 ^2 {/ C1 i7 Y+ N( K
2025147 ADW TDO-SHAREPOIN Design Management stops responding when a board file is deleted and then checked in with the same name" N7 C) c. k1 K7 t8 l6 g, Z
2025201 ADW TDO-SHAREPOIN Getting error message (SPDWSD-20) when logging in to team design4 `7 C6 Q7 K3 G& c8 u
2052046 ADW TDO-SHAREPOIN Joining projects is downloading 0-byte files due to SSL error! A: C5 O$ ?: y, @* h
2056694 ADW TDO-SHAREPOIN Design Management stops responding on checking in an object with the same name as a previously deleted object
- R3 S6 Z6 P1 g7 V( M1 |* }: x2047512 ALLEGRO_EDITOR 3D_CANVAS Mechanical components do not move when bending in 3D Viewer; ~/ @/ ~6 u& j* ?1 X
2048086 ALLEGRO_EDITOR 3D_CANVAS Wirebonds are not linked to diepad when component is embedded body down, w2 y7 g( y& T6 H5 \3 F2 {
2051277 ALLEGRO_EDITOR 3D_CANVAS 3D View Vias are Offset from Board in Z direction
' C/ j1 ~, }7 S; K9 [6 x& Y2054327 ALLEGRO_EDITOR 3D_CANVAS 3D Canvas error: All bend operations are disabled due to licensing and/or DLL installation
3 s) M- m, N4 E k! k" u1 n+ o2056547 ALLEGRO_EDITOR 3D_CANVAS 3D model not shown for component with STEP file assigned
# s0 W0 u4 ~1 g" v; [( n. j2044980 ALLEGRO_EDITOR ARTWORK 'Import - Artwork': PCB Editor stops responding and no artworks are loaded
% Y+ Z# P, g; i) F+ T2061203 ALLEGRO_EDITOR CROSS_SECTION Importing cross-section from single stackup to multiple stackup adding additional layers to the primary zone c' m' j9 X3 C W% P6 A; O- y
1826533 ALLEGRO_EDITOR DATABASE Dyn_Thermal_Con_Type not behaving as defined in Symbol Editor after placing on PCB file.3 `! D3 O$ F( E% c0 u+ Z: }/ g
1857282 ALLEGRO_EDITOR DATABASE PCB Editor slow when Manhattan and Path length tooltip enabled in datatip customization
9 ]9 [# }+ A' d" `( e8 r1 D2052767 ALLEGRO_EDITOR DATABASE Allegro PCB Editor crashes on editing padstack- f( N+ j1 M) f( W0 d& p6 ?
1825692 ALLEGRO_EDITOR DRAFTING Dimension line text moved by Update Symbols* P4 G7 f+ R# J) U/ p$ `( P
1874814 ALLEGRO_EDITOR DRAFTING 'Connect Lines' does not merge overlapping lines/ U3 C8 }- ~+ G
1874935 ALLEGRO_EDITOR DRAFTING Angular dimension text has extra spaces added before the degree symbol.' H) |5 m7 J0 C1 c! `4 ~
1882597 ALLEGRO_EDITOR DRAFTING 'Trim Segment' should allow trimming for all intersecting segment types
7 v" q* j# b1 o- X k& t/ O2052315 ALLEGRO_EDITOR DRC_CONSTR DRC (pad-shape) incorrect when both pad and drill are offset from pad origin.
3 X. D$ _. s& u. _, L+ n2040603 ALLEGRO_EDITOR EDIT_SHAPE Shape is not updating correctly after the 'move' command
. l4 k; _/ ~/ q7 `( {6 q/ w2050177 ALLEGRO_EDITOR INTERACTIV Letters need to remain aligned and uniform after performing Boolean ANDNOT operation4 Q( G1 W2 Q% {. e5 C: l( V, A; k* k
2052586 ALLEGRO_EDITOR IPC IPC356 showing shorts and disconnects for chip-on-board design3 A* P' S+ T/ Z! v2 @9 I& g' `! ~
2044350 ALLEGRO_EDITOR MANUFACT Cross Section table showing multiple decimal digits for the Tolerance column" |+ J' Z" H* q- k9 p, \4 H' O
2051150 ALLEGRO_EDITOR NC Counterbore/Countersink holes not being shown in the NC legend table.
5 q5 w1 n7 C8 K* p0 a9 ? T: p% B2058199 ALLEGRO_EDITOR NC 'Manufacture - NC - Drill Legend' does not populate the CounterBore/CounterSink row values in the Drill Chart table: f' R, C. O8 F! e0 {
2061809 ALLEGRO_EDITOR NC Counter bore NC Legend does not show any data
2 }0 m. c. F- r- i) I# V2063477 ALLEGRO_EDITOR NC Counter bore NC Legend does not show its value
/ M7 [- }4 e" e" j' M% y; D2033849 ALLEGRO_EDITOR PLACEMENT PCB Editor stops responding when removing a plane that the Place Replicate command added
8 o% X$ A; ?5 f+ Y. g- g% J5 ^2037509 ALLEGRO_EDITOR PLACEMENT Move or Rotate or Mirror of a module/group makes PCB Editor to crash with no .SAV file created( @7 Y q' U' W) W/ P
2047480 ALLEGRO_EDITOR SCHEM_FTB Importing netlist using Capture-CM flow in PCB Editor is crashing netrev) b, w2 r. l! V
2046276 ALLEGRO_EDITOR SHAPE Add notch is not snapping to the grid point
) z" r# {$ T5 R4 j8 R- J: a2047572 ALLEGRO_EDITOR SHAPE Voiding elements on static shape do not void adjacent layer keep-outs and PCB Editor stops responding
$ y# _5 _9 e B& b8 Y2048483 ALLEGRO_EDITOR SHAPE Shapes not getting updated post backdrill update9 ?5 }2 U, m! b* C
2050120 ALLEGRO_EDITOR SHAPE Dynamic fill is flooding over other etch shapes within a symbol.
1 P- y: k k& J. d) ?2058017 ALLEGRO_EDITOR SHAPE Shape not voiding correctly when fillets are present$ w3 [) _& ^5 v
2010569 ALLEGRO_EDITOR SKILL Using SKILL to add 'nil' to a DRC object following a 'println' statement crashes PCB Editor in hotfix 048.
, {' U ~4 A0 t% V2055055 ALLEGRO_EDITOR SKILL Using SKILL to add a 'nil' property value to a String causes Allegro PCB Editor to crash
+ @$ @; S* R3 d3 ]+ `- X5 F1961689 ALLEGRO_EDITOR SYMBOL Pin Numbers are moved from center with Pin Rotation when adding pins to Footprint
" R9 X) C5 z9 E% }2034949 ALLEGRO_EDITOR SYMBOL Angular dimension from DRA not created in PCB
, D1 f1 L4 N8 N, B( T2046242 ALLEGRO_EDITOR UI_GENERAL Searching User Preference Summary results in crash
) m, r/ @/ ]$ d$ x* B* J+ [2 W2053496 ALLEGRO_EDITOR UI_GENERAL Confirmation dialog box is behind canvas9 P( h ?6 Y9 q8 k" f0 s! R! q
2063423 ALLEGRO_EDITOR UI_GENERAL Blocking dialog popped up by axlUIPrompt() goes behind the canvas and is hidden( u6 D2 P) ^, V. c" p J4 A
1886781 ALLEGRO_VIEWER OTHER Opening Color192 in Allegro Free Viewer causes it to crash; \+ h4 Q6 _$ k$ E
1699433 APD EDIT_ETCH Field solver runs when not expected
7 e& ]5 _, H+ r1937159 APD EDIT_ETCH Routing clines takes long time
0 @8 z1 {( b! G, X4 e8 C2050863 APD SHAPE Taper voiding process is different in Within the region/Out of Region
: ]) F% g' J0 ]: R+ ?8 _* c2047391 CAPTURE PART_EDITOR Pin type cannot be changed in hotfix 051! v( M0 O6 A% z9 e. F o; u
2049161 CAP_EDIF IMPORT Fatal error 'cannot determine grid' when converting third-party design to Capture
) \9 X% W2 N1 C6 T( S) ?2053578 CONCEPT_HDL CONSTRAINT_MG Values specified for custom properties are not preserved
" x! V5 { H: w! B, W2047583 CONCEPT_HDL COPY_PROJECT Design Entry HDL crashing when trying to open page 52 of copied project, {$ }& s s% }9 f; w. j
2036239 CONCEPT_HDL CORE When cutting/pasting, multiple error pop-ups appear for the same notification
3 ~) b6 G9 B* X/ z- N2 a: t4 T2037572 CONCEPT_HDL CORE Warning (SPCOCD-578): Soft VOLTAGE property found is misleading and should be auto resolved when closing CM
9 {2 Q! Z% \2 I6 ]) [. R/ k* W2037578 CONCEPT_HDL CORE VOLTAGE property gets deleted after copying it from a non-synchronized source
0 Q. n- x% w( ]5 B2046958 CONCEPT_HDL CORE Moving block pins from symbol right to left places pin names outside the symbol
. ?6 f- u% M% V( n' }. [3 h2032480 CONSTRAINT_MGR CONCEPT_HDL Incorrect matchgroups created when working with multiple level nested hierarchical blocks" A4 G$ _/ m9 K& U5 r
2045274 CONSTRAINT_MGR CONCEPT_HDL Running SKILL script or navigating pages in the hierarchy viewer crashes schematic editor
3 u& k: o, Y" C0 S2046765 SIP_LAYOUT DIE_ABSTRACT_ SiP Layout 'dump libraries' crashes when exporting library$ [8 }8 Z$ k z2 A9 g. N, W
2067970 SIP_LAYOUT DIE_ABSTRACT_ SiP Layout cannot dump libraries, viewlog is empty+ w: G, C( x$ x5 [9 k
1981749 SYSTEM_CAPTURE ARCHIVER System Capture: Archiving a design from the Tcl command window results in error
! J& w; z1 v3 T! X- c5 Y1968437 SYSTEM_CAPTURE ASSIGN_SIGNAL Net name pasted in lower-case though UPPERCASE INPUT is enabled2 k. R0 g# V# e: c
1983063 SYSTEM_CAPTURE AUTOSHAPES Auto Shapes are being shown as part of components
) N3 G' g5 I% c) v1 ?% [1968463 SYSTEM_CAPTURE CANVAS_EDIT System Capture should not allow illegal characters to be entered for net names
3 S2 U* e& W! d0 f: v( D6 I2006593 SYSTEM_CAPTURE CANVAS_EDIT Asterisk in a search string is not treated as a wildcard character* k. I$ y# z- ~1 G9 Q: B
1721863 SYSTEM_CAPTURE CONNECTIVITY_ Net Names move to random locations when the components are moved around the canvas/ Q% N8 v4 ?8 X7 X8 K* Z
1960130 SYSTEM_CAPTURE CONNECTIVITY_ Disconnected nets when using the mirror option
3 R: B8 _+ A+ B0 x+ h1985029 SYSTEM_CAPTURE EDIT_OPERATIO Net aliases do not drag with circuit, they appear to move after the circuit is dropped( u* }/ s" K4 M. v+ m+ L' x
1895142 SYSTEM_CAPTURE EXPORT_PCB System Capture reports incorrect unsaved changes when closed after running export physical- l7 n- L9 k$ j" \
1628596 SYSTEM_CAPTURE FIND_REPLACE Alias issue in Find: Results do not show the resolved physical net names
% f. K* B; F$ h& c& K4 W1988297 SYSTEM_CAPTURE FIND_REPLACE Edit > Find and Replace does not replace a net with an existing net on the canvas0 m3 p5 v& o. g% J& k
1843885 SYSTEM_CAPTURE FORMAT_OBJECT Renaming a net causes it to lose custom color assignment
. u7 ~! B( Q9 |$ @1969308 SYSTEM_CAPTURE FORMAT_OBJECT System Capture: Clicking arrows to increase/decrease font size does not work correctly when clicked fast9 G' V/ }+ r1 ^+ C$ ]2 \
1990060 SYSTEM_CAPTURE FORMAT_OBJECT Bold, italics, and underline formats not visually shown on all selected objects concurrently
' I" m, R5 y" i5 G9 c- f1993208 SYSTEM_CAPTURE FORMAT_OBJECT Setting font prior to placing text does not work, pop-up does not work, and bucket results in scrolling page' i2 \) u0 H8 o6 y
1981775 SYSTEM_CAPTURE IMPORT_PCB Import Physical takes a long time on some designs to launch the UI9 O. Y8 C4 Z \ I4 {
1982320 SYSTEM_CAPTURE IMPORT_PCB In the B2F flow none of the *view files are created
* g* x/ l1 \/ \, w \2010996 SYSTEM_CAPTURE INSERT_PICTUR Image in title block is at a wrong location in design: correctly placed in library
1 O) u3 f2 L# H, H* \. c1967614 SYSTEM_CAPTURE MISCELLANEOUS Dragging a circuit with net aliases does not move the net aliases with it
, W$ V( ^3 i o) m/ }) T+ ^1 n+ K1980999 SYSTEM_CAPTURE NEW_PROJECT System Capture stops working with message regarding Part Manager initialization for a design based on DE-HDL/ H% M* ^: ~5 ~& b
1973437 SYSTEM_CAPTURE OPEN_CLOSE_PR Opening a design crashes System Capture
( N1 t6 j; a+ D. `( S6 {7 ~* @1986566 SYSTEM_CAPTURE OPEN_CLOSE_PR System Captures stops responding on opening project, cleaning project displays project already open message- q) t- V" G6 W$ n6 {8 a
1993093 SYSTEM_CAPTURE OPEN_CLOSE_PR Add option to override the lock file similar to Allegro PCB Editor
c* p. [* t6 m) k/ A7 }$ r2042360 SYSTEM_CAPTURE OPEN_CLOSE_PR System Capture will not open nor gives error message when previous lock file present inside the logic folder% V2 l4 E$ o( W* C# i
1992247 SYSTEM_CAPTURE PART_MANAGER Part Manager displays message for undo and redo stack even after specifying not to show message4 N- ^: u S# L/ y- D2 K0 X3 h
2048000 SYSTEM_CAPTURE PERFORMANCE Performance issue when instantiating and moving a component/ ?1 [: s7 H/ r3 V. k0 A0 H! W( x* k; g
1892120 SYSTEM_CAPTURE PROPERTY_EDIT Some parts missing reference designators and some have two properties, RefDes and REFDES4 k+ U1 ]' U$ }: Z" [
1970009 SYSTEM_CAPTURE PROPERTY_EDIT System Capture: Right-clicking RefDes with conflict in 'Edit Properties' shows the Hyperlink option; F% w+ H! j# ?' a
2042707 SYSTEM_CAPTURE VARIANT_MANAG variant.lst file under 'physical' folder not updated when closing Variant Editor. t! W# `3 }% h) b
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发表于 2019-4-8 19:46
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