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装完还是显示052 0 V" e' G7 r& O- C9 D, Y
Fixed CCRs: SPB 17.2 HF053 [1 P5 b. {$ D2 N
03-01-2019' W$ Z+ F! z; f c$ r
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- |3 N3 M8 @6 A# w$ ECCRID Product ProductLevel2 Title% C; ^2 `+ Y* q- H3 B) f' M" G
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2035766 ADW DSN_MIGRATION EDM release 17.2-2016: design migration UI is cut off on right! c6 L9 P! @# ?* P& K
2044872 ADW PART_BROWSER Component Browser: Only one PTF file read for multiple PTF files under Part Table all referenced in master.tag
8 C6 K* K( [* y2 _/ L, B2025147 ADW TDO-SHAREPOIN Design Management stops responding when a board file is deleted and then checked in with the same name
- a0 x2 T! I7 o4 i1 M+ F# z7 j7 p) {/ G1 V! L2025201 ADW TDO-SHAREPOIN Getting error message (SPDWSD-20) when logging in to team design1 e$ t. e! g. D$ Y
2052046 ADW TDO-SHAREPOIN Joining projects is downloading 0-byte files due to SSL error8 Z; T% b- u' O U6 f+ n
2056694 ADW TDO-SHAREPOIN Design Management stops responding on checking in an object with the same name as a previously deleted object; v6 Z% O- Q! w; j
2047512 ALLEGRO_EDITOR 3D_CANVAS Mechanical components do not move when bending in 3D Viewer
# _' Y; t/ D: M3 r" O4 n2048086 ALLEGRO_EDITOR 3D_CANVAS Wirebonds are not linked to diepad when component is embedded body down
2 ?- [* i( v {' |7 T2051277 ALLEGRO_EDITOR 3D_CANVAS 3D View Vias are Offset from Board in Z direction
! E e0 r1 |, U* l0 M: T' s2 ^: J2054327 ALLEGRO_EDITOR 3D_CANVAS 3D Canvas error: All bend operations are disabled due to licensing and/or DLL installation0 \& O3 u& D' W% d
2056547 ALLEGRO_EDITOR 3D_CANVAS 3D model not shown for component with STEP file assigned
; D# J5 @+ `, A$ v. @4 F+ K, K1 }2044980 ALLEGRO_EDITOR ARTWORK 'Import - Artwork': PCB Editor stops responding and no artworks are loaded
7 h9 R$ l9 D0 e4 n6 X1 m. h2061203 ALLEGRO_EDITOR CROSS_SECTION Importing cross-section from single stackup to multiple stackup adding additional layers to the primary zone
; a+ D* Y! G! D$ W1 w/ O' M1826533 ALLEGRO_EDITOR DATABASE Dyn_Thermal_Con_Type not behaving as defined in Symbol Editor after placing on PCB file.% t1 o$ ^9 [! I F' K% J
1857282 ALLEGRO_EDITOR DATABASE PCB Editor slow when Manhattan and Path length tooltip enabled in datatip customization
, p& Z' E/ {7 t$ T2 j+ P2052767 ALLEGRO_EDITOR DATABASE Allegro PCB Editor crashes on editing padstack
5 _" H& L/ ?! V U4 S7 f- I$ E1825692 ALLEGRO_EDITOR DRAFTING Dimension line text moved by Update Symbols* g8 W0 m- \. u' `3 r# K
1874814 ALLEGRO_EDITOR DRAFTING 'Connect Lines' does not merge overlapping lines
5 P7 ?# Y0 \, ^9 [1 \1874935 ALLEGRO_EDITOR DRAFTING Angular dimension text has extra spaces added before the degree symbol.
; D P3 U; n% M0 z/ s1882597 ALLEGRO_EDITOR DRAFTING 'Trim Segment' should allow trimming for all intersecting segment types# m1 b1 V& \8 _4 r/ J
2052315 ALLEGRO_EDITOR DRC_CONSTR DRC (pad-shape) incorrect when both pad and drill are offset from pad origin.; R, y B( G# s
2040603 ALLEGRO_EDITOR EDIT_SHAPE Shape is not updating correctly after the 'move' command# ?2 ?5 X2 h- J, {6 P0 s1 J
2050177 ALLEGRO_EDITOR INTERACTIV Letters need to remain aligned and uniform after performing Boolean ANDNOT operation- [. o1 c: w) P& l0 z
2052586 ALLEGRO_EDITOR IPC IPC356 showing shorts and disconnects for chip-on-board design; z* k! O! ]5 U
2044350 ALLEGRO_EDITOR MANUFACT Cross Section table showing multiple decimal digits for the Tolerance column3 l! D( x7 ?. n0 D
2051150 ALLEGRO_EDITOR NC Counterbore/Countersink holes not being shown in the NC legend table.
3 u( ` b1 o5 t4 e2058199 ALLEGRO_EDITOR NC 'Manufacture - NC - Drill Legend' does not populate the CounterBore/CounterSink row values in the Drill Chart table
/ C! y) A1 |0 f2061809 ALLEGRO_EDITOR NC Counter bore NC Legend does not show any data
3 J8 ^! D* l5 W2063477 ALLEGRO_EDITOR NC Counter bore NC Legend does not show its value; Q3 R6 ?$ D. P& m$ ^
2033849 ALLEGRO_EDITOR PLACEMENT PCB Editor stops responding when removing a plane that the Place Replicate command added1 W& Y$ _" l6 R$ J3 a7 d
2037509 ALLEGRO_EDITOR PLACEMENT Move or Rotate or Mirror of a module/group makes PCB Editor to crash with no .SAV file created/ L' m+ h5 S3 j( M, |3 n/ i
2047480 ALLEGRO_EDITOR SCHEM_FTB Importing netlist using Capture-CM flow in PCB Editor is crashing netrev' |! t2 C# @3 z1 ?) Q6 P$ F
2046276 ALLEGRO_EDITOR SHAPE Add notch is not snapping to the grid point
" A+ D3 T# I' Q/ E1 S2047572 ALLEGRO_EDITOR SHAPE Voiding elements on static shape do not void adjacent layer keep-outs and PCB Editor stops responding
. Q5 V4 w$ S9 R. S( F3 `2048483 ALLEGRO_EDITOR SHAPE Shapes not getting updated post backdrill update+ p8 o) D; K: C- r6 O1 @
2050120 ALLEGRO_EDITOR SHAPE Dynamic fill is flooding over other etch shapes within a symbol.
: w$ ]. F0 O) ?- h) c2058017 ALLEGRO_EDITOR SHAPE Shape not voiding correctly when fillets are present/ z4 w- Y9 o" x& ?5 i
2010569 ALLEGRO_EDITOR SKILL Using SKILL to add 'nil' to a DRC object following a 'println' statement crashes PCB Editor in hotfix 048.
% n9 @1 G" Q$ E( C! q8 ~1 J5 f2055055 ALLEGRO_EDITOR SKILL Using SKILL to add a 'nil' property value to a String causes Allegro PCB Editor to crash) O! m# F$ ]' S* t
1961689 ALLEGRO_EDITOR SYMBOL Pin Numbers are moved from center with Pin Rotation when adding pins to Footprint u- R. g( g' Y5 ~# \" M1 z
2034949 ALLEGRO_EDITOR SYMBOL Angular dimension from DRA not created in PCB- X: l1 z6 E# i& `2 Y
2046242 ALLEGRO_EDITOR UI_GENERAL Searching User Preference Summary results in crash
7 M) a+ }& V! P! ?" E$ t% S2053496 ALLEGRO_EDITOR UI_GENERAL Confirmation dialog box is behind canvas
) H% g" Z8 Q1 s2 h x2063423 ALLEGRO_EDITOR UI_GENERAL Blocking dialog popped up by axlUIPrompt() goes behind the canvas and is hidden
# ?+ c- q+ V# E) P- U8 E1886781 ALLEGRO_VIEWER OTHER Opening Color192 in Allegro Free Viewer causes it to crash4 M" e) i3 r4 _( S+ J; M
1699433 APD EDIT_ETCH Field solver runs when not expected
2 n# G6 ~1 Q/ z2 `1 R1 i1937159 APD EDIT_ETCH Routing clines takes long time
1 U. X. D( ?: ~! D: C. ~5 l2050863 APD SHAPE Taper voiding process is different in Within the region/Out of Region
9 E* E7 f8 ]2 C2047391 CAPTURE PART_EDITOR Pin type cannot be changed in hotfix 051' a( b7 j, g/ S) B' s
2049161 CAP_EDIF IMPORT Fatal error 'cannot determine grid' when converting third-party design to Capture
/ Z, {- G9 k; C, k2053578 CONCEPT_HDL CONSTRAINT_MG Values specified for custom properties are not preserved
3 x5 \9 u, P! t: o5 ` l- b6 j2047583 CONCEPT_HDL COPY_PROJECT Design Entry HDL crashing when trying to open page 52 of copied project
7 ]3 T* _, j6 x5 g) l2036239 CONCEPT_HDL CORE When cutting/pasting, multiple error pop-ups appear for the same notification* @! l8 o0 b8 O; P( m2 [6 x3 V
2037572 CONCEPT_HDL CORE Warning (SPCOCD-578): Soft VOLTAGE property found is misleading and should be auto resolved when closing CM
8 v; J- J; ?- y2037578 CONCEPT_HDL CORE VOLTAGE property gets deleted after copying it from a non-synchronized source
" @" n. m! a" R" D# X) S0 P2046958 CONCEPT_HDL CORE Moving block pins from symbol right to left places pin names outside the symbol
( A$ z4 g, p3 _/ F) L% S, Y T2032480 CONSTRAINT_MGR CONCEPT_HDL Incorrect matchgroups created when working with multiple level nested hierarchical blocks& \8 K% l; M4 w& c6 i5 S
2045274 CONSTRAINT_MGR CONCEPT_HDL Running SKILL script or navigating pages in the hierarchy viewer crashes schematic editor5 N z! }$ c3 [- W6 [: l, q
2046765 SIP_LAYOUT DIE_ABSTRACT_ SiP Layout 'dump libraries' crashes when exporting library
# r1 `2 }5 W& g' L3 }; I/ @( i2067970 SIP_LAYOUT DIE_ABSTRACT_ SiP Layout cannot dump libraries, viewlog is empty3 O: S+ O2 \2 p. o1 O9 x( d' S9 |
1981749 SYSTEM_CAPTURE ARCHIVER System Capture: Archiving a design from the Tcl command window results in error
* |0 o3 g, ]7 n1 U4 p, K8 M1 `2 \7 ?3 G1968437 SYSTEM_CAPTURE ASSIGN_SIGNAL Net name pasted in lower-case though UPPERCASE INPUT is enabled" E$ G1 S- \5 O
1983063 SYSTEM_CAPTURE AUTOSHAPES Auto Shapes are being shown as part of components3 C* X0 U1 g* @! T* j: S: q
1968463 SYSTEM_CAPTURE CANVAS_EDIT System Capture should not allow illegal characters to be entered for net names
! G7 j# c4 J& ~6 Z7 {) V4 E2006593 SYSTEM_CAPTURE CANVAS_EDIT Asterisk in a search string is not treated as a wildcard character
. D" H, `6 x& [8 z1 F) x( {1721863 SYSTEM_CAPTURE CONNECTIVITY_ Net Names move to random locations when the components are moved around the canvas
# p* B' @5 k4 H9 b$ l4 |' m- }1960130 SYSTEM_CAPTURE CONNECTIVITY_ Disconnected nets when using the mirror option R. ]; g. p' s4 a
1985029 SYSTEM_CAPTURE EDIT_OPERATIO Net aliases do not drag with circuit, they appear to move after the circuit is dropped% o- ^/ h) r* g8 }2 u- d. x
1895142 SYSTEM_CAPTURE EXPORT_PCB System Capture reports incorrect unsaved changes when closed after running export physical
$ V8 i5 W7 W$ C4 E, A0 @* p& `+ }1628596 SYSTEM_CAPTURE FIND_REPLACE Alias issue in Find: Results do not show the resolved physical net names
4 t3 }! E0 ~- U, }1988297 SYSTEM_CAPTURE FIND_REPLACE Edit > Find and Replace does not replace a net with an existing net on the canvas& D/ i: r% O; O
1843885 SYSTEM_CAPTURE FORMAT_OBJECT Renaming a net causes it to lose custom color assignment
1 u" ~9 p, Z$ R* w6 y3 B a9 `# }; l1969308 SYSTEM_CAPTURE FORMAT_OBJECT System Capture: Clicking arrows to increase/decrease font size does not work correctly when clicked fast
1 y6 k: H3 N9 o1990060 SYSTEM_CAPTURE FORMAT_OBJECT Bold, italics, and underline formats not visually shown on all selected objects concurrently
; j3 C/ ^7 r! E. Q2 s5 ?: R# ?1993208 SYSTEM_CAPTURE FORMAT_OBJECT Setting font prior to placing text does not work, pop-up does not work, and bucket results in scrolling page
2 u7 n# D/ p5 Y0 u1 i7 H- Q J1981775 SYSTEM_CAPTURE IMPORT_PCB Import Physical takes a long time on some designs to launch the UI/ u) N4 P* n' L# w
1982320 SYSTEM_CAPTURE IMPORT_PCB In the B2F flow none of the *view files are created
6 @/ s1 \' J+ `0 _! j2010996 SYSTEM_CAPTURE INSERT_PICTUR Image in title block is at a wrong location in design: correctly placed in library: V4 ]% i$ z9 c
1967614 SYSTEM_CAPTURE MISCELLANEOUS Dragging a circuit with net aliases does not move the net aliases with it
" Q6 C* G, f/ m+ Z8 F1980999 SYSTEM_CAPTURE NEW_PROJECT System Capture stops working with message regarding Part Manager initialization for a design based on DE-HDL
$ m/ Q Z- g% _% M( \4 b1973437 SYSTEM_CAPTURE OPEN_CLOSE_PR Opening a design crashes System Capture- x6 f# w! U5 l" |
1986566 SYSTEM_CAPTURE OPEN_CLOSE_PR System Captures stops responding on opening project, cleaning project displays project already open message
- n' E! l- J; N* d1 u1993093 SYSTEM_CAPTURE OPEN_CLOSE_PR Add option to override the lock file similar to Allegro PCB Editor! L6 n- E6 S- r7 ]* E
2042360 SYSTEM_CAPTURE OPEN_CLOSE_PR System Capture will not open nor gives error message when previous lock file present inside the logic folder
$ b; J2 X$ ~0 Q# A5 W' H7 m- W% Z1992247 SYSTEM_CAPTURE PART_MANAGER Part Manager displays message for undo and redo stack even after specifying not to show message
5 v3 i: l4 L$ A: s9 E2048000 SYSTEM_CAPTURE PERFORMANCE Performance issue when instantiating and moving a component! {7 L3 _' n2 X5 h2 u
1892120 SYSTEM_CAPTURE PROPERTY_EDIT Some parts missing reference designators and some have two properties, RefDes and REFDES
6 T& H. E9 _2 F5 W( _1970009 SYSTEM_CAPTURE PROPERTY_EDIT System Capture: Right-clicking RefDes with conflict in 'Edit Properties' shows the Hyperlink option/ c/ X4 b# O3 ^1 S2 Q
2042707 SYSTEM_CAPTURE VARIANT_MANAG variant.lst file under 'physical' folder not updated when closing Variant Editor
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发表于 2019-4-6 21:51
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