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装完还是显示052 + ?* `3 i( ^9 d5 T T
Fixed CCRs: SPB 17.2 HF053
2 n- V3 ^" Z7 T% ~& {3 ~03-01-2019
9 M& |4 B# N- H9 G7 k2 _0 a& N========================================================================================================================================================
% C" i2 H5 z% c( X7 X7 }/ ACCRID Product ProductLevel2 Title/ {4 w9 i! w$ a+ m
========================================================================================================================================================
4 B& D H+ c' J4 e$ I2035766 ADW DSN_MIGRATION EDM release 17.2-2016: design migration UI is cut off on right
- X# f6 [) F, K: z) T2044872 ADW PART_BROWSER Component Browser: Only one PTF file read for multiple PTF files under Part Table all referenced in master.tag9 ~, [& I; F) P9 S |
2025147 ADW TDO-SHAREPOIN Design Management stops responding when a board file is deleted and then checked in with the same name! E( `! Z" G" f% i p' w# M" z
2025201 ADW TDO-SHAREPOIN Getting error message (SPDWSD-20) when logging in to team design8 j9 ^) j4 }/ U8 \$ _
2052046 ADW TDO-SHAREPOIN Joining projects is downloading 0-byte files due to SSL error
0 R/ t% s- |/ G" c% O# c& d9 ?2 k2056694 ADW TDO-SHAREPOIN Design Management stops responding on checking in an object with the same name as a previously deleted object7 }- S: p$ J$ n) k/ C
2047512 ALLEGRO_EDITOR 3D_CANVAS Mechanical components do not move when bending in 3D Viewer
. M) U @7 `3 R( u7 J1 t! S2048086 ALLEGRO_EDITOR 3D_CANVAS Wirebonds are not linked to diepad when component is embedded body down
. \; x0 H; s7 G- m- `' A2 \: T2051277 ALLEGRO_EDITOR 3D_CANVAS 3D View Vias are Offset from Board in Z direction$ v6 O6 c4 L; X3 a+ ?! i
2054327 ALLEGRO_EDITOR 3D_CANVAS 3D Canvas error: All bend operations are disabled due to licensing and/or DLL installation
- {4 b/ Z% ~# ?0 u& d2056547 ALLEGRO_EDITOR 3D_CANVAS 3D model not shown for component with STEP file assigned( J9 K, L7 W1 }9 G i) |: D: |
2044980 ALLEGRO_EDITOR ARTWORK 'Import - Artwork': PCB Editor stops responding and no artworks are loaded
! K1 l' \9 Y, u. y/ ?8 V! i# |" F0 z2061203 ALLEGRO_EDITOR CROSS_SECTION Importing cross-section from single stackup to multiple stackup adding additional layers to the primary zone
* o8 h4 l9 e% r' [; D8 [- P1826533 ALLEGRO_EDITOR DATABASE Dyn_Thermal_Con_Type not behaving as defined in Symbol Editor after placing on PCB file.
0 d. f; Y" D. {1 }( J: c1 `2 [9 F1857282 ALLEGRO_EDITOR DATABASE PCB Editor slow when Manhattan and Path length tooltip enabled in datatip customization. r" C, s) N) d1 M0 ]/ _" Y9 w" K$ |
2052767 ALLEGRO_EDITOR DATABASE Allegro PCB Editor crashes on editing padstack
9 N$ z3 z, x0 `1 ], B! A9 \" g1825692 ALLEGRO_EDITOR DRAFTING Dimension line text moved by Update Symbols0 Y6 l1 b8 d5 F# J/ ?7 Q
1874814 ALLEGRO_EDITOR DRAFTING 'Connect Lines' does not merge overlapping lines
" m$ Q& k# `$ F8 q+ ^! k1 [1874935 ALLEGRO_EDITOR DRAFTING Angular dimension text has extra spaces added before the degree symbol.. G% o) d+ j8 P8 H$ m
1882597 ALLEGRO_EDITOR DRAFTING 'Trim Segment' should allow trimming for all intersecting segment types
* N$ ~3 f# v/ g2 y1 p7 Q2052315 ALLEGRO_EDITOR DRC_CONSTR DRC (pad-shape) incorrect when both pad and drill are offset from pad origin.
) ] p5 m, K- @" T2040603 ALLEGRO_EDITOR EDIT_SHAPE Shape is not updating correctly after the 'move' command
8 v8 \% b; l2 t) P4 I1 B, L2050177 ALLEGRO_EDITOR INTERACTIV Letters need to remain aligned and uniform after performing Boolean ANDNOT operation
. R* Q; P" O' m# t9 x2052586 ALLEGRO_EDITOR IPC IPC356 showing shorts and disconnects for chip-on-board design
9 T) n6 N, P& Z3 `8 C) ^% {2044350 ALLEGRO_EDITOR MANUFACT Cross Section table showing multiple decimal digits for the Tolerance column# ^% o: o) Q7 o- s- X& o4 Z
2051150 ALLEGRO_EDITOR NC Counterbore/Countersink holes not being shown in the NC legend table.
- ?% X' H* B. O, i0 j$ |2058199 ALLEGRO_EDITOR NC 'Manufacture - NC - Drill Legend' does not populate the CounterBore/CounterSink row values in the Drill Chart table& W) E! d1 \+ e: D
2061809 ALLEGRO_EDITOR NC Counter bore NC Legend does not show any data! m6 P/ Q$ }8 E
2063477 ALLEGRO_EDITOR NC Counter bore NC Legend does not show its value$ `$ u j6 j1 Q' V
2033849 ALLEGRO_EDITOR PLACEMENT PCB Editor stops responding when removing a plane that the Place Replicate command added+ t/ i- R4 N, D2 v/ F2 Q5 A- H) i
2037509 ALLEGRO_EDITOR PLACEMENT Move or Rotate or Mirror of a module/group makes PCB Editor to crash with no .SAV file created
" [) |+ P% Z& B: F" c, f( [2047480 ALLEGRO_EDITOR SCHEM_FTB Importing netlist using Capture-CM flow in PCB Editor is crashing netrev; {6 ~7 y0 G; ^; [( p0 Q/ j) b2 t( ^
2046276 ALLEGRO_EDITOR SHAPE Add notch is not snapping to the grid point, [) i$ s+ D8 j* A
2047572 ALLEGRO_EDITOR SHAPE Voiding elements on static shape do not void adjacent layer keep-outs and PCB Editor stops responding
/ P$ Z. x- Z( }7 {) C2048483 ALLEGRO_EDITOR SHAPE Shapes not getting updated post backdrill update
$ s0 u N. Z- D, H/ V* V2050120 ALLEGRO_EDITOR SHAPE Dynamic fill is flooding over other etch shapes within a symbol.
! S: c' B& [ p5 V0 u+ U" I P2058017 ALLEGRO_EDITOR SHAPE Shape not voiding correctly when fillets are present* [, k8 q" _; p! G5 [
2010569 ALLEGRO_EDITOR SKILL Using SKILL to add 'nil' to a DRC object following a 'println' statement crashes PCB Editor in hotfix 048.0 k. x- i5 H' ?2 m" B' W
2055055 ALLEGRO_EDITOR SKILL Using SKILL to add a 'nil' property value to a String causes Allegro PCB Editor to crash
* z" R* [6 Y6 H, X1961689 ALLEGRO_EDITOR SYMBOL Pin Numbers are moved from center with Pin Rotation when adding pins to Footprint- ^! e4 A6 Q9 ?: @) Y3 @- f
2034949 ALLEGRO_EDITOR SYMBOL Angular dimension from DRA not created in PCB
2 S9 q* z$ ?/ `" L$ T- S# C2046242 ALLEGRO_EDITOR UI_GENERAL Searching User Preference Summary results in crash
' r8 H9 `/ }7 F# R2053496 ALLEGRO_EDITOR UI_GENERAL Confirmation dialog box is behind canvas
. J' E- V/ e1 u0 [# h9 c* g/ w* d; v' {2063423 ALLEGRO_EDITOR UI_GENERAL Blocking dialog popped up by axlUIPrompt() goes behind the canvas and is hidden- Z" @* C) \9 F0 w/ S R) e/ ^8 e3 I, L( N
1886781 ALLEGRO_VIEWER OTHER Opening Color192 in Allegro Free Viewer causes it to crash) V( A7 U8 i5 R0 b/ q. K
1699433 APD EDIT_ETCH Field solver runs when not expected
" S0 S c* \1 ^; A" K9 H; E1937159 APD EDIT_ETCH Routing clines takes long time1 D/ P. g/ w2 L5 Q% k" r
2050863 APD SHAPE Taper voiding process is different in Within the region/Out of Region/ Z3 h( z' ?! h/ K8 U. H
2047391 CAPTURE PART_EDITOR Pin type cannot be changed in hotfix 051
$ ? l: P0 N6 w0 l$ Z2049161 CAP_EDIF IMPORT Fatal error 'cannot determine grid' when converting third-party design to Capture
& U7 D: f, F5 Q( W& V' z* ]' c2053578 CONCEPT_HDL CONSTRAINT_MG Values specified for custom properties are not preserved
1 b3 t2 {! y. A" L2047583 CONCEPT_HDL COPY_PROJECT Design Entry HDL crashing when trying to open page 52 of copied project& V6 X4 d& n; B
2036239 CONCEPT_HDL CORE When cutting/pasting, multiple error pop-ups appear for the same notification
! ]( o+ w; i0 t2037572 CONCEPT_HDL CORE Warning (SPCOCD-578): Soft VOLTAGE property found is misleading and should be auto resolved when closing CM
% i, c$ g- V5 _* K; f2037578 CONCEPT_HDL CORE VOLTAGE property gets deleted after copying it from a non-synchronized source
& |* |' ^- P3 E4 h* J6 @2046958 CONCEPT_HDL CORE Moving block pins from symbol right to left places pin names outside the symbol
C: N7 A5 I) c1 t5 c+ Y' J. f2032480 CONSTRAINT_MGR CONCEPT_HDL Incorrect matchgroups created when working with multiple level nested hierarchical blocks9 [/ w P! O8 Q3 u, B* V
2045274 CONSTRAINT_MGR CONCEPT_HDL Running SKILL script or navigating pages in the hierarchy viewer crashes schematic editor. p* i; a' K4 |! g
2046765 SIP_LAYOUT DIE_ABSTRACT_ SiP Layout 'dump libraries' crashes when exporting library! U0 L/ @2 m8 s- y8 a" ^
2067970 SIP_LAYOUT DIE_ABSTRACT_ SiP Layout cannot dump libraries, viewlog is empty
: Q4 y/ ~5 \; @" D& C; U1981749 SYSTEM_CAPTURE ARCHIVER System Capture: Archiving a design from the Tcl command window results in error' g! {# J3 _, B# G& ?! f
1968437 SYSTEM_CAPTURE ASSIGN_SIGNAL Net name pasted in lower-case though UPPERCASE INPUT is enabled9 p8 _& J- {0 ?
1983063 SYSTEM_CAPTURE AUTOSHAPES Auto Shapes are being shown as part of components
; b& D6 E, U9 [- U' G1968463 SYSTEM_CAPTURE CANVAS_EDIT System Capture should not allow illegal characters to be entered for net names
/ ~# k& `0 E# \$ s; m/ J1 N: X# J2006593 SYSTEM_CAPTURE CANVAS_EDIT Asterisk in a search string is not treated as a wildcard character# U: o% B: I/ Y" V- n4 A
1721863 SYSTEM_CAPTURE CONNECTIVITY_ Net Names move to random locations when the components are moved around the canvas: `& V# y' A5 I1 }6 i
1960130 SYSTEM_CAPTURE CONNECTIVITY_ Disconnected nets when using the mirror option8 T5 C( l0 d' o
1985029 SYSTEM_CAPTURE EDIT_OPERATIO Net aliases do not drag with circuit, they appear to move after the circuit is dropped
. {' R7 T9 Z2 Q% n/ x: G* t1895142 SYSTEM_CAPTURE EXPORT_PCB System Capture reports incorrect unsaved changes when closed after running export physical
3 U {- }9 z4 A6 G) |1628596 SYSTEM_CAPTURE FIND_REPLACE Alias issue in Find: Results do not show the resolved physical net names" O8 @$ T9 `/ A( {
1988297 SYSTEM_CAPTURE FIND_REPLACE Edit > Find and Replace does not replace a net with an existing net on the canvas( d$ x4 u" N* t: M: W [
1843885 SYSTEM_CAPTURE FORMAT_OBJECT Renaming a net causes it to lose custom color assignment
5 H8 ]1 k3 G! e1969308 SYSTEM_CAPTURE FORMAT_OBJECT System Capture: Clicking arrows to increase/decrease font size does not work correctly when clicked fast
) I5 j9 p9 P2 h( M' l1990060 SYSTEM_CAPTURE FORMAT_OBJECT Bold, italics, and underline formats not visually shown on all selected objects concurrently
' t$ O: D. ~2 L2 n. Z1993208 SYSTEM_CAPTURE FORMAT_OBJECT Setting font prior to placing text does not work, pop-up does not work, and bucket results in scrolling page
( n1 r; c4 g% n" V( `" f! v1981775 SYSTEM_CAPTURE IMPORT_PCB Import Physical takes a long time on some designs to launch the UI8 E& @( i6 u$ r1 z7 |. ^
1982320 SYSTEM_CAPTURE IMPORT_PCB In the B2F flow none of the *view files are created
' ~/ w/ k6 T* d$ m" g3 U2010996 SYSTEM_CAPTURE INSERT_PICTUR Image in title block is at a wrong location in design: correctly placed in library1 A/ K6 @' ^' n/ P
1967614 SYSTEM_CAPTURE MISCELLANEOUS Dragging a circuit with net aliases does not move the net aliases with it
A7 O' d+ @1 B' a1980999 SYSTEM_CAPTURE NEW_PROJECT System Capture stops working with message regarding Part Manager initialization for a design based on DE-HDL, y1 y% d# A1 `% o; Y
1973437 SYSTEM_CAPTURE OPEN_CLOSE_PR Opening a design crashes System Capture
3 p! @) J, Y* E5 Q4 }4 J" B1986566 SYSTEM_CAPTURE OPEN_CLOSE_PR System Captures stops responding on opening project, cleaning project displays project already open message
0 y7 ]9 o" f' h+ }- E4 \1993093 SYSTEM_CAPTURE OPEN_CLOSE_PR Add option to override the lock file similar to Allegro PCB Editor
& m( t3 Q/ w& m. a2 o; c$ A; I* e2042360 SYSTEM_CAPTURE OPEN_CLOSE_PR System Capture will not open nor gives error message when previous lock file present inside the logic folder1 w4 ]6 }" w# P4 G
1992247 SYSTEM_CAPTURE PART_MANAGER Part Manager displays message for undo and redo stack even after specifying not to show message
3 }( w' {7 O6 K6 h2 S" ]& Q2048000 SYSTEM_CAPTURE PERFORMANCE Performance issue when instantiating and moving a component) K. O5 k3 N9 U
1892120 SYSTEM_CAPTURE PROPERTY_EDIT Some parts missing reference designators and some have two properties, RefDes and REFDES
9 e# G. ^. M( {) Y) K* W1970009 SYSTEM_CAPTURE PROPERTY_EDIT System Capture: Right-clicking RefDes with conflict in 'Edit Properties' shows the Hyperlink option0 D' y5 D0 B1 r { ~
2042707 SYSTEM_CAPTURE VARIANT_MANAG variant.lst file under 'physical' folder not updated when closing Variant Editor7 d$ }0 {: [9 ^/ S' b6 ?- N. H! O* u1 b
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发表于 2019-4-6 21:51
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