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装完还是显示052
2 ?; X6 g& Z' V+ M. aFixed CCRs: SPB 17.2 HF053: i1 w. o* X K& G, s+ ?2 x
03-01-2019
+ N# ? \$ n4 c* d# ~7 m% s========================================================================================================================================================
; U( O G9 I& A/ |3 q1 \4 m- BCCRID Product ProductLevel2 Title7 n8 {5 T* Q; R# _( M$ @
========================================================================================================================================================7 j [. p$ s9 @0 }8 m4 s
2035766 ADW DSN_MIGRATION EDM release 17.2-2016: design migration UI is cut off on right
7 t4 |. u2 V* i7 [2044872 ADW PART_BROWSER Component Browser: Only one PTF file read for multiple PTF files under Part Table all referenced in master.tag
8 u( a- C6 l* C+ O7 Q) @, _2025147 ADW TDO-SHAREPOIN Design Management stops responding when a board file is deleted and then checked in with the same name
( i [, s( ^2 `6 t1 f2025201 ADW TDO-SHAREPOIN Getting error message (SPDWSD-20) when logging in to team design9 Z q$ q9 y1 a- H8 P; @
2052046 ADW TDO-SHAREPOIN Joining projects is downloading 0-byte files due to SSL error
% D9 j3 H: ?( c8 x0 h6 c1 [9 A" b2056694 ADW TDO-SHAREPOIN Design Management stops responding on checking in an object with the same name as a previously deleted object6 f) C* K' {! t' H, t& o. e
2047512 ALLEGRO_EDITOR 3D_CANVAS Mechanical components do not move when bending in 3D Viewer5 A" _. x8 K5 L: m" x5 M
2048086 ALLEGRO_EDITOR 3D_CANVAS Wirebonds are not linked to diepad when component is embedded body down
* b/ Q0 x" Q2 O2 ~- D8 @7 W v2051277 ALLEGRO_EDITOR 3D_CANVAS 3D View Vias are Offset from Board in Z direction- p$ F( j4 b4 d% |/ M9 t, i2 O
2054327 ALLEGRO_EDITOR 3D_CANVAS 3D Canvas error: All bend operations are disabled due to licensing and/or DLL installation
" ~( j0 |/ h4 V6 J5 t2056547 ALLEGRO_EDITOR 3D_CANVAS 3D model not shown for component with STEP file assigned
1 }4 j. }2 G) k+ D5 I6 h2044980 ALLEGRO_EDITOR ARTWORK 'Import - Artwork': PCB Editor stops responding and no artworks are loaded
5 d$ ~9 Z& M) |* T. `, d2061203 ALLEGRO_EDITOR CROSS_SECTION Importing cross-section from single stackup to multiple stackup adding additional layers to the primary zone/ _. [9 g: H5 C
1826533 ALLEGRO_EDITOR DATABASE Dyn_Thermal_Con_Type not behaving as defined in Symbol Editor after placing on PCB file.3 a8 H# x" }# `: p4 g- f
1857282 ALLEGRO_EDITOR DATABASE PCB Editor slow when Manhattan and Path length tooltip enabled in datatip customization
6 c5 I7 L! r% l( x2052767 ALLEGRO_EDITOR DATABASE Allegro PCB Editor crashes on editing padstack
) y, h- z% o* ]" k& \- t* s% Q, ~1825692 ALLEGRO_EDITOR DRAFTING Dimension line text moved by Update Symbols4 x9 j M! P- P9 Y$ F) I4 T- I7 D
1874814 ALLEGRO_EDITOR DRAFTING 'Connect Lines' does not merge overlapping lines
% Z8 Z5 R; y& x% ]1874935 ALLEGRO_EDITOR DRAFTING Angular dimension text has extra spaces added before the degree symbol.
3 W/ j4 h5 x9 i" T* p. p; B1882597 ALLEGRO_EDITOR DRAFTING 'Trim Segment' should allow trimming for all intersecting segment types
. c* z" X1 n9 j3 p( v2052315 ALLEGRO_EDITOR DRC_CONSTR DRC (pad-shape) incorrect when both pad and drill are offset from pad origin.' J5 ?! X3 W3 h1 t( b
2040603 ALLEGRO_EDITOR EDIT_SHAPE Shape is not updating correctly after the 'move' command7 i! r/ `' N4 Z# M
2050177 ALLEGRO_EDITOR INTERACTIV Letters need to remain aligned and uniform after performing Boolean ANDNOT operation3 Q% }% }( g5 V
2052586 ALLEGRO_EDITOR IPC IPC356 showing shorts and disconnects for chip-on-board design
, O- M |$ w, o8 `" U& \2044350 ALLEGRO_EDITOR MANUFACT Cross Section table showing multiple decimal digits for the Tolerance column
( b% f) |. r F9 N: X$ e* E2051150 ALLEGRO_EDITOR NC Counterbore/Countersink holes not being shown in the NC legend table.
3 x! t* K, c7 y0 d9 I) u0 h$ ~2058199 ALLEGRO_EDITOR NC 'Manufacture - NC - Drill Legend' does not populate the CounterBore/CounterSink row values in the Drill Chart table
( v0 f: x+ p% J2061809 ALLEGRO_EDITOR NC Counter bore NC Legend does not show any data- r) y! ~# G# M9 V
2063477 ALLEGRO_EDITOR NC Counter bore NC Legend does not show its value' x# J4 M; B7 C) P3 E8 a8 }
2033849 ALLEGRO_EDITOR PLACEMENT PCB Editor stops responding when removing a plane that the Place Replicate command added
* @' x Y5 R% J' u9 J2037509 ALLEGRO_EDITOR PLACEMENT Move or Rotate or Mirror of a module/group makes PCB Editor to crash with no .SAV file created
# F$ X% D5 L- [& M6 b, Y# U/ X2 H2 z2047480 ALLEGRO_EDITOR SCHEM_FTB Importing netlist using Capture-CM flow in PCB Editor is crashing netrev: x/ p0 p# |6 M# r* y2 a' Y
2046276 ALLEGRO_EDITOR SHAPE Add notch is not snapping to the grid point, [' U2 B$ C7 [* j
2047572 ALLEGRO_EDITOR SHAPE Voiding elements on static shape do not void adjacent layer keep-outs and PCB Editor stops responding& S6 M3 X& r! l8 f7 S! D& S
2048483 ALLEGRO_EDITOR SHAPE Shapes not getting updated post backdrill update( o( K6 b" S# }* I7 s: g s, }* {
2050120 ALLEGRO_EDITOR SHAPE Dynamic fill is flooding over other etch shapes within a symbol.# q' K3 O3 o1 z$ T5 I7 M5 D" E% u
2058017 ALLEGRO_EDITOR SHAPE Shape not voiding correctly when fillets are present" Q% Y0 n) v& ^ \1 }
2010569 ALLEGRO_EDITOR SKILL Using SKILL to add 'nil' to a DRC object following a 'println' statement crashes PCB Editor in hotfix 048.; B" T6 u# G) h1 D
2055055 ALLEGRO_EDITOR SKILL Using SKILL to add a 'nil' property value to a String causes Allegro PCB Editor to crash- x7 J# O0 I1 a. D+ ? g1 E
1961689 ALLEGRO_EDITOR SYMBOL Pin Numbers are moved from center with Pin Rotation when adding pins to Footprint7 G) w& B7 s5 C. Y! c* c9 |% P7 c
2034949 ALLEGRO_EDITOR SYMBOL Angular dimension from DRA not created in PCB" z9 i* ~0 X( N* X& N
2046242 ALLEGRO_EDITOR UI_GENERAL Searching User Preference Summary results in crash m' X& ?( W* H* ], p U
2053496 ALLEGRO_EDITOR UI_GENERAL Confirmation dialog box is behind canvas
, p( {$ v7 ]8 c& ]2063423 ALLEGRO_EDITOR UI_GENERAL Blocking dialog popped up by axlUIPrompt() goes behind the canvas and is hidden: e- z9 [8 L+ u: A/ s# h* Z4 h
1886781 ALLEGRO_VIEWER OTHER Opening Color192 in Allegro Free Viewer causes it to crash! I5 `( D8 ?0 s
1699433 APD EDIT_ETCH Field solver runs when not expected
- P& o% ?* q" g1937159 APD EDIT_ETCH Routing clines takes long time
3 v [, ?4 p5 X2050863 APD SHAPE Taper voiding process is different in Within the region/Out of Region# s& @ t' X! h" l: ~$ Y- @$ \/ E
2047391 CAPTURE PART_EDITOR Pin type cannot be changed in hotfix 051, U. W" H8 p- Z* O6 r
2049161 CAP_EDIF IMPORT Fatal error 'cannot determine grid' when converting third-party design to Capture* [9 ~# h% s1 x! g4 Z
2053578 CONCEPT_HDL CONSTRAINT_MG Values specified for custom properties are not preserved
7 S7 i/ P5 D) u0 v2047583 CONCEPT_HDL COPY_PROJECT Design Entry HDL crashing when trying to open page 52 of copied project
; A7 X3 m6 m" q1 |% @( f( U: S2036239 CONCEPT_HDL CORE When cutting/pasting, multiple error pop-ups appear for the same notification
2 c8 x/ Y0 k( r5 v9 u2037572 CONCEPT_HDL CORE Warning (SPCOCD-578): Soft VOLTAGE property found is misleading and should be auto resolved when closing CM
$ b2 T$ P7 p2 ~5 F; E2037578 CONCEPT_HDL CORE VOLTAGE property gets deleted after copying it from a non-synchronized source" f# k5 [$ y* q3 }6 R* X* X5 K! P
2046958 CONCEPT_HDL CORE Moving block pins from symbol right to left places pin names outside the symbol
$ c$ H3 g, A$ F8 M2032480 CONSTRAINT_MGR CONCEPT_HDL Incorrect matchgroups created when working with multiple level nested hierarchical blocks$ s7 T ]2 {' V4 |% G4 ^3 K
2045274 CONSTRAINT_MGR CONCEPT_HDL Running SKILL script or navigating pages in the hierarchy viewer crashes schematic editor
u- y0 |- \2 y! d/ o2 K$ ?+ M2046765 SIP_LAYOUT DIE_ABSTRACT_ SiP Layout 'dump libraries' crashes when exporting library: i3 U$ ` {% s# R
2067970 SIP_LAYOUT DIE_ABSTRACT_ SiP Layout cannot dump libraries, viewlog is empty
B4 t. W# M5 a2 z1 I) ?1981749 SYSTEM_CAPTURE ARCHIVER System Capture: Archiving a design from the Tcl command window results in error# T1 N+ S/ M2 q2 _; `$ G" p6 l
1968437 SYSTEM_CAPTURE ASSIGN_SIGNAL Net name pasted in lower-case though UPPERCASE INPUT is enabled
2 a& \5 O2 O& S; ]! L; e% j9 C1983063 SYSTEM_CAPTURE AUTOSHAPES Auto Shapes are being shown as part of components
- c. t8 d9 x3 w0 c2 V1 b3 v1968463 SYSTEM_CAPTURE CANVAS_EDIT System Capture should not allow illegal characters to be entered for net names! }3 x0 P2 s! n$ _) W
2006593 SYSTEM_CAPTURE CANVAS_EDIT Asterisk in a search string is not treated as a wildcard character/ b* y) W6 w, V+ y" D) B! q: t
1721863 SYSTEM_CAPTURE CONNECTIVITY_ Net Names move to random locations when the components are moved around the canvas- C9 ], s* R' _& A) \
1960130 SYSTEM_CAPTURE CONNECTIVITY_ Disconnected nets when using the mirror option" s! ~/ L# d. d" Y ^
1985029 SYSTEM_CAPTURE EDIT_OPERATIO Net aliases do not drag with circuit, they appear to move after the circuit is dropped
# M# }6 x! E6 m1 H+ \; H1 N1895142 SYSTEM_CAPTURE EXPORT_PCB System Capture reports incorrect unsaved changes when closed after running export physical
9 |9 C6 c6 O. h! U* w* j1628596 SYSTEM_CAPTURE FIND_REPLACE Alias issue in Find: Results do not show the resolved physical net names
+ G2 I% n8 q, \( f1988297 SYSTEM_CAPTURE FIND_REPLACE Edit > Find and Replace does not replace a net with an existing net on the canvas9 v& w5 Y: n% g9 }7 q
1843885 SYSTEM_CAPTURE FORMAT_OBJECT Renaming a net causes it to lose custom color assignment7 H- I& a( E* b4 o. d
1969308 SYSTEM_CAPTURE FORMAT_OBJECT System Capture: Clicking arrows to increase/decrease font size does not work correctly when clicked fast' O6 w4 L- k; M( w5 I
1990060 SYSTEM_CAPTURE FORMAT_OBJECT Bold, italics, and underline formats not visually shown on all selected objects concurrently: O- y2 J4 m8 s9 {
1993208 SYSTEM_CAPTURE FORMAT_OBJECT Setting font prior to placing text does not work, pop-up does not work, and bucket results in scrolling page
; Y+ x8 g+ k4 T, w1981775 SYSTEM_CAPTURE IMPORT_PCB Import Physical takes a long time on some designs to launch the UI: y) C$ O, ?$ \' t& @' Y$ V+ I
1982320 SYSTEM_CAPTURE IMPORT_PCB In the B2F flow none of the *view files are created
3 R6 z" y- u7 f* c1 P2010996 SYSTEM_CAPTURE INSERT_PICTUR Image in title block is at a wrong location in design: correctly placed in library
* {" L& y. R' O" p+ ]# A% J: M+ s1 D1967614 SYSTEM_CAPTURE MISCELLANEOUS Dragging a circuit with net aliases does not move the net aliases with it' b8 g- V7 k7 }
1980999 SYSTEM_CAPTURE NEW_PROJECT System Capture stops working with message regarding Part Manager initialization for a design based on DE-HDL# s. j" q% |) N; `1 G, R
1973437 SYSTEM_CAPTURE OPEN_CLOSE_PR Opening a design crashes System Capture/ h+ Z Y4 A# b, J" o* o1 J- r
1986566 SYSTEM_CAPTURE OPEN_CLOSE_PR System Captures stops responding on opening project, cleaning project displays project already open message
4 [ B" e2 j0 J5 d5 b# c1993093 SYSTEM_CAPTURE OPEN_CLOSE_PR Add option to override the lock file similar to Allegro PCB Editor# V3 ?- l4 Z* A" `4 k
2042360 SYSTEM_CAPTURE OPEN_CLOSE_PR System Capture will not open nor gives error message when previous lock file present inside the logic folder
) X2 l$ K, [. ~* X2 I1992247 SYSTEM_CAPTURE PART_MANAGER Part Manager displays message for undo and redo stack even after specifying not to show message
* [! }2 R" T0 A" v0 S& \2048000 SYSTEM_CAPTURE PERFORMANCE Performance issue when instantiating and moving a component
5 R: m( J" E4 L' l% ^ X1892120 SYSTEM_CAPTURE PROPERTY_EDIT Some parts missing reference designators and some have two properties, RefDes and REFDES/ X8 W5 e& g; [3 f& J% N
1970009 SYSTEM_CAPTURE PROPERTY_EDIT System Capture: Right-clicking RefDes with conflict in 'Edit Properties' shows the Hyperlink option
$ x9 Y6 u, d, t" A! o2042707 SYSTEM_CAPTURE VARIANT_MANAG variant.lst file under 'physical' folder not updated when closing Variant Editor
% ~7 I$ Y* p5 h3 P1 | ?+ z! i7 D. V U
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发表于 2019-4-6 21:51
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