modelsim仿真出现错误FATAL ERROR while loading design 该怎么解决，谢谢

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初学modelsim，仿真时出现问题，FATAL ERROR while loading design
7 `4 M$ T+ \! r4 d1 z6 n5 {8 `请问是什么原因，怎样解决？
' G4 \! P/ X, ^% b& I; T# vsim -vopt work.mul
1 K) E5 v3 e% M- V; x1 {% S# ** Note: (vsim-3812) Design is being optimized...
# Loading G:\Modeltech_6.2b\win32/../std.standard
6 }0 j: L/ q  L- k( `: O' w# Loading work.mul(func)
# ** Fatal: (vsim-3347) Port 'in1' is not constrained.
2 |$ w2 S5 ], J) b- ?) n& q#    Time: 0 ns  Iteration: 0  Instance: /mul File: G:/Modeltech_6.2b/examples/mul.vhd Line: 3
& W& s$ d9 ^4 r# FATAL ERROR while loading design
* I9 E6 _0 x# d0 k8 W6 Y# Error loading design
# P4 H& m% U0 |7 a2 ~5 j) b/ r5 U2 f
* z& `  U  @( z, z8 l; g请大家帮帮忙，谢谢