我用cadence16.5 conceptHDL设计原理图,完成后道pCB,我使用的Top-down式原理图设计方式 5 X5 M# Z+ F- V; D导PCB时提示“Connectitivity server is unable to load design. The .xcon file might be missing or incorrect. Your design needs to be netlisted in 16.4 or later version of Design Entry HDL"9 |. w0 v8 X: f
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这个是由什么问题导致的? " r" i) {' X' Q- o# v8 `