|
Cadence Design Systems, Inc. netrev 15.7 Mon Sep 08 14:06:39 2008
. h9 ]( w- c, ]' C(C) Copyright 2002 Cadence Design Systems, Inc.
, j; z5 `" E w" c6 l! k4 _------ Directives ------+ G1 I1 G5 M& d( o# N
RIPUP_ETCH FALSE;
! v5 Q. f5 S/ x/ C7 t2 qRIPUP_SYMBOLS ALWAYS;
4 t6 ?4 P% O0 W( `# b& v l9 iMISSING SYMBOL AS ERROR FALSE;1 l' i1 a! y- b- [1 h
SCHEMATIC_DIRECTORY 'C:/project/orcad/forderix';
% B9 s1 c0 ?3 s$ N& ~( NBOARD_DIRECTORY '';' d. i6 {0 D1 Q: w
OLD_BOARD_NAME 'F:/Cadence/unnamed.brd';
, Q3 c: U( N& @9 H6 a/ aNEW_BOARD_NAME 'F:/Cadence/unnamed.brd';
6 x/ S+ \ ]- y0 L% J3 V7 iCmdLine: netrev -$ -5 -i C:/project/orcad/forderix -u -y 1 -z F:/Cadence/#Taaaaaa03428.tmp
! L$ f, t( r' ~% P. e------ Preparing to read pst files ------/ r3 ?% Y/ i* k2 a! t7 P" W) G
+ G0 H: y6 J4 _5 g. n! r#1 ERROR(24) File not found* A+ S! Z2 f1 z9 R4 i
Packager files not found7 e/ W' L* H9 _& m" o+ E: v
#2 ERROR(102) Run stopped because errors were detected: \& O& W6 {; F% M' q
netrev run on Sep 8 14:06:39 2008
0 |" O' h! Y8 p COMPILE 'logic'
7 }7 ~' l, f4 C+ Q CHECK_PIN_NAMES OFF1 r% C$ q4 {& X7 X# ~
CROSS_REFERENCE OFF- F+ Z+ X/ t8 ^. n. f3 T
FEEDBACK OFF3 x7 m, f( X4 [% C- u. u
INCREMENTAL OFF% T- A2 }) T' U
INTERFACE_TYPE PHYSICAL
- X# K1 T& H7 s MAX_ERRORS 500
. d7 o) H* F Y0 { MERGE_MINIMUM 5
# a+ A, G5 a, \; A- _9 Z8 m. w/ l NET_NAME_CHARS '#%&()*+-./:=>?@[]^_`|'$ y% u8 ?9 v4 C0 V/ N
NET_NAME_LENGTH 24
3 g( u7 |4 F5 \1 h. c. B4 P OVERSIGHTS ON) a2 {7 E: X) Q$ X
REPLACE_CHECK OFF7 b: t9 q% `" v. r
SINGLE_NODE_NETS ON
, h$ }* _2 U# V5 f# | SPLIT_MINIMUM 0
5 m- K' I; }: b. O, ^ SUPPRESS 20- e% _* g: D7 F* B" j$ u" o
WARNINGS ON7 g7 Q( b, l+ b; p1 s
2 errors detected4 _4 K6 ^, A4 E8 Z0 p4 Q
No oversight detected8 p+ i( \* R2 G- w
No warning detected! U/ e, M8 W8 f1 _
cpu time 0:00:039 R) ^& w5 m0 X9 t2 ^$ l6 S
elapsed time 0:00:00
: u' b# {6 g# r; t8 _0 {/ C
+ M5 f0 B6 p3 M3 X) s0 G5 }导入网表有以上错误,第一个错误我知道是没有封装,可哪个零件没封装怎么查找?
. D) d! `+ o$ X' e, s 第二个错误又是什么呢?: P; H# X |# I- f# ]. d) ?! `/ B
还有netlist.txt又在什么路径下面? |
|