TA的每日心情 | 开心 2023-10-13 15:24 |
---|
签到天数: 3 天 [LV.2]偶尔看看I
|
EDA365欢迎您登录!
您需要 登录 才可以下载或查看,没有帐号?注册
x
+ S- d5 w. X7 n% G+ L3 jSPB16.60.033, Version: SPB:Hotfix:16.60.033~wint 7 Z4 z! c K& ^. @4 l9 A. ?1 O
还没时间下!6 T. Z6 n: C9 ~6 w- H" v* d
1 i9 Y% g; Z8 u+ V7 j
& E$ @6 W' O: Z3 A! t4 D+ ~" M2 v& YDATE: 08-7-2014 HOTFIX VERSION: 033
+ }7 T; n) F, R2 b+ L===================================================================================================================================% ]. p6 e" u2 H9 h9 S7 a
CCRID PRODUCT PRODUCTLEVEL2 TITLE/ p3 l4 o' j7 F# w# d
===================================================================================================================================
' m* @# N4 o9 p2 V; V! P7 m$ J1265152 CONSTRAINT_MGR OTHER In CM, for a new worksheet, the Actuals are not seen for Class-Class Objects.
. c6 i4 U G. x+ s; I. d, Y0 [# N1269155 CONSTRAINT_MGR INTERACTIV Constraint manager does not evaluate the formulas if the min value is more than the max value! B, N0 |1 l, w+ p8 H
1279589 APD NC Duplicated Drills8 H1 V" W6 r) P G/ w1 ^, m, m
1280288 CONSTRAINT_MGR OTHER The option "rename existing refdes" is hidden while doing File>import>logic
6 T% h, o g' ^* f. b% r& e1285122 CONSTRAINT_MGR UI_FORMS Analysis Settings does not appear in constraint Manager Sigrity SI7 V0 ]# p% [: W) C
1291054 concept_HDL ARCHIVER archiver fails to create the cds.lib & cpm files when the -views switch is used in the command line2 K3 I K" J% m
1291186 SIP_LAYOUT DXF_IF Export DXF is incorrectly exporting the top layer pins when they aren?t specified in the output.
7 d4 s0 g2 T- C+ j. x1292595 CONSTRAINT_MGR SCHEM_FTB Revision number reset in dcf when running Import Physical
1 J$ w( h9 I9 j) M0 f* n: `' a1293346 allegro_EDITOR GRAPHICS smd symbols with Step model not correctly shown in 3D Viewer9 A9 C7 ]# G' L. ?4 @7 P( ?
1293579 ADW PCBCACHE ERROR(SPCOCD-553): Connectivity Server Error: Failed to load component cell 'ti_template.ets600_pogp_143p:sym_1'
) `4 w0 g Q, [ Q6 ]1293733 SIG_EXPLORER EXTRACTTOP SigXP extraction: Bad memory usage in logicalop Head! message is output on Linux) P: J# |" d6 |( b, i S
1293911 ALLEGRO_EDITOR EDIT_ETCH Using AiPT on this design causes an unrelated via to be deleted
* l% [7 e7 a2 _% J" B" N1296433 CONCEPT_HDL CORE DEHDL crashes when saving hierarchy- F# W `0 T$ \4 ]" r; M3 j
1296735 ALLEGRO_EDITOR NC Customer want to know why we change the description in SPB166, it causes CAM350 can`t import drill file.
6 T; o, H0 _. q+ n. I' E1296743 APD DEGASSING Degassing creates wrong voids for second and subsequent shapes when multiple shapes are selected$ T+ t8 n/ d" k' o- K: ~+ E9 _% e
1296803 ALLEGRO_EDITOR OTHER Can no longer access some drawing subclasses in 16.6
0 ~8 K9 A& L+ n1298421 ADW LRM Artesyn: LRM cannot update the part.
! V: t* B- c2 ]7 T9 g1299871 APD WIREBOND The axlSetAllProfilesVisible return all "nill"
" n$ K1 s# F) I1300186 ALLEGRO_EDITOR DATABASE Deleted NetGroups in DEHDL appear in the Allegro PCB CM5 R: g1 Q6 [5 i& Z
1300961 CONSTRAINT_MGR CONCEPT_HDL cmdfeedback.exe crashes during import physical5 B! r( ]* s7 |3 |
1301180 ALLEGRO_EDITOR GRAPHICS 3D Viewer for SMD footprint shows top pads on bottom layer and place bound wrongly |
|