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EDA365电子论坛网»电子社区 › EDA工具&PCB设计 › Mentor Xpedition论坛 › ForwardAnnotation.txt 哪里有错误
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ForwardAnnotation.txt 哪里有错误

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mentor.

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发表于 2011-5-5 22:21 | 只看该作者 回帖奖励 |倒序浏览 |阅读模式

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本帖最后由 mentor. 于 2011-5-5 23:15 编辑 " q2 M  q2 p: _! F- K4 ?' U( S

' Y3 m% M& I+ P& j         Forward Annotation
" _; H0 e* h. [; x+ w" i# R                               ------------------
; Y2 {1 h( m/ `$ R0 c  Y                         10:19 PM Thursday, May 05, 2011! N* W8 P5 l; f* o4 u
                Job Name: C:\WDIR\MyPrj\NIOS\NIOSii\PCB\NIOS.pcb
1 h0 |8 j6 q) c7 R" e5 P- w
8 z( O! w9 O) ^! }! mVersion:  01.01.00
! _: |, g$ y% e6 p* {9 V     The PDBs listed in the project file will be searched to satisfy the parts
9 q6 q& C6 a% B+ B( K. L6 f1 I/ ?      requirements of the iCDB only for parts not already found in the. q3 Z6 x7 ~, i/ o2 k
      Target PDB.
0 O4 l7 T' y1 F     The schematic source is a Common Data Base.
  T1 o, ^. w: {' {5 ?  Y     The AllowAlphaRefDes status indicates that reference( a6 L8 G. l- @" o+ `% j
      designators containing all alpha characters should be deleted
$ ?: L7 K" l% o0 ]+ s      and the relevant symbols repackaged.' m. G  v0 a1 p5 l' O
& c. }/ ?( w/ m
     Common Data Base has been read
  P6 v! |. t4 l( E; `0 `- L     Target PDB Name: Work\Layout_Temp\PartsDB.pdb
, L) G' g: O+ P% ?  J6 X     Number of Part Numbers: 20
% j$ U: x4 `  q9 ~) b          Part Numb: AMS1117 -> Vend Part: AMS1117 4 I5 O5 b3 m2 @' t6 Z
          Part Numb: Cap220UF -> Vend Part: Cap220UF $ G4 Z, P3 L  h# u+ `
          Part Numb: Cap0805 -> Vend Part: Cap0805
5 `+ w# e6 n- F+ R, F7 _- h1 i3 w          Part Numb: Cap1210 -> Vend Part: Cap1210 ( b* A2 s' `* B, ?8 ^& w( s
          Part Numb: Cry_50M -> Vend Part: Cry_50M 4 y; j  }1 _% F( u
          Part Numb: DC_POWER -> Vend Part: DC_POWER
" @) E( V: \% E: _* B% o; O  ^          Part Numb: EPCS4SI8 -> Vend Part: EPCS4SI8 ) S) _7 \7 u8 P7 `9 g' l2 ~8 y6 {/ j
          Part Numb: EP2C8Q208 -> Vend Part: EP2C8Q208
8 o, H3 p- C9 J% O7 o. K! D# F          Part Numb: FB -> Vend Part: FB
1 ?& Y8 n! P8 _, M3 F$ ?& G          Part Numb: Header10 -> Vend Part: Header10 3 d: x2 w( [6 a: I
          Part Numb: Header25x2 -> Vend Part: Header25x2
8 C; m0 G6 x- ~& p; f          Part Numb: IS61LV25616AL -> Vend Part: IS61LV25616AL
: m5 K, s8 j& _( @! T9 E          Part Numb: JS28F320J3D -> Vend Part: JS28F320J3D % s5 |( j* S" n+ }. l
          Part Numb: K4S281632K -> Vend Part: K4S281632K 2 j# X+ P- h& A5 y, R4 Z
          Part Numb: LED -> Vend Part: LED 1 j4 I; \" |* o3 M' K$ c( h
          Part Numb: Res0805 -> Vend Part: Res0805
0 n- S: Q( \$ K1 \. a2 Q          Part Numb: SMB -> Vend Part: SMB 0 O8 m& H4 Y1 S
          Part Numb: SW -> Vend Part: SW # T4 {! X5 s! p1 h/ A3 O, ?
          Part Numb: SW_90 -> Vend Part: SW_90
$ Y' j7 }! J+ i' j          Part Numb: SW4 -> Vend Part: SW4 7 }" b# q: D; a7 `) {. {
     Number of Part Names: 0
2 i% _; t$ R- I8 {. r9 [6 e     Number of Part Labels: 0
" N, S4 y' x* s
( M5 ^, K' u* [" w: i

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mentor.

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2#
 楼主| 发表于 2011-5-5 22:22 | 只看该作者
Checking for value differences between symbol properties and PartsDB properties: o1 H- i& G5 a1 s+ q4 n' h# u
5 v" t) B7 W4 P+ {3 m
     Checking the validity of the packaging of prepackaged schematic
% n9 \- A4 q, B+ ^/ E; f* N0 t      symbols.  Only the first error in symbols having the same
9 A/ z$ s7 x5 O  b$ w      Reference Designator will be reported.
. Y- V5 P/ \5 e+ i
: [" C* Q3 C$ c; C     The packaging of all prepackaged schematic symbols is consistent
, h* l/ ]' b, R- u8 w( O, @      with the Parts DataBase data for the cross mapping of: P4 V+ \1 m5 ~( N+ H& L6 H
      symbol pin names to Part Number pin numbers.
& x8 w- ^& |7 g9 x$ E      Symbols that were not prepackaged will now be packaged correctly.
4 H7 B6 |) l5 t      
/ f7 I' T: Y1 q% u& A     No errors in Existing Schematic Packaging.
. f, a# h' ]/ t9 i+ D( o! U5 s8 f5 q
     The Common DataBase has been read and will be packaged.
9 b( g/ c2 i+ N     Clustering 109 Symbols:  Y  [9 d% I! Q1 _. a1 n" k2 G# Q
             109  ********
  V, Y% R! o; s" D             100  **************************************************3 k! L# L$ [" Z0 E
              50  **************************************************
2 g8 O+ Q, |: Y: i, {$ I& ]     Clustering is Complete
6 {9 ^. O. V9 K3 n* X/ n
1 M0 E8 y5 \$ P" l; n     Packager Assignments successfully completed& I1 M# P1 _/ h0 c* W1 P

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3#
 楼主| 发表于 2011-5-5 22:23 | 只看该作者
187 nets were found containing 676 pins
9 n; ?8 C5 i9 J6 O! d* Z. g8 [, g     101 components were found! K4 h# l& c- ^" q/ U

7 L$ ~4 b8 q8 F9 ~2 v9 i: d     WARNING:  Cell  could not be found in the CellDB for1 R8 V, u6 A& M2 O& d% t- H
      Part Number K4S281632K.' b6 V5 l; }) a+ B3 P

: ^/ j5 C; @" G6 }; D8 P     WARNING:  Cell  could not be found in the CellDB for
4 _6 v, ~% m) r! L      Part Number IS61LV25616AL.
: a3 v+ B1 r# a$ G9 Z
4 N, j# w/ g  _6 ^+ D# ~     2 Pin application warnings found as noted above.
1 p- T- A& B+ a  j6 `
1 f% i! p+ r0 m' {* ^     Creating a formatted Schematic Netlist (LogFiles\SchematicNetlist.txt)...3 q/ _& U' X  |
     A formatted Schematic Netlist has been created.9 H% O) J7 e7 U$ _! J$ e

; o- |4 ^6 x, E& D" N     The Logic DataBase has been compiled from the Schematic Design.
# Z5 b1 Y. X3 U      Use Netload to bring the Component Design into sync.$ I' J' [$ x: f, ~* r3 ~
. d1 m/ R4 W1 U
     This Logic Data was Compiled with 2 warnings.
/ [9 \/ I% ]" t" a* I: T6 r# L. X      Erroneous results may occur if not fixed.
" T; h6 ~. }" y0 Y2 t7 j9 i# d8 a. y! ~
                                     NetLoad
3 k3 |3 A, S. Z                                     -------
- V2 m% [* o; S* g# {. _
* v2 _' e" s) [5 L/ q                         10:19 PM Thursday, May 05, 2011* W0 f- ~+ ^2 L2 B/ s: M, l* k% i9 Z
                Job Name: C:\WDIR\MyPrj\NIOS\NIOSii\PCB\NIOS.pcb- }  M; u) M8 X, m3 A0 B' ^* k* [$ s
  u0 K# D8 P4 x& n% Z
' |8 h! N2 t+ e. s4 o& O
Version:  02.11.12; y7 C' _9 X" ]7 P

' m  {1 n8 Z( u6 T; C% ?. u3 O3 Z7 u        Netloading the Layout.  Unused components will be changed to spares.$ Z: |& m7 S( W' t$ G6 u; P8 b) n2 {

, P" s: F# V! ?2 P1 o        Unconnected pins will be set to net "(Net0)".7 h" o) g0 ]' X
2 H& D- [4 ]) D( C. x. S
        Schematic reference designator changes will be forward annotated.* v# A" \7 e  p0 l

0 I# L  [5 ]9 |2 S0 f7 v# \4 \0 i  k5 C4 f
     "C17" is being converted from a spare to a "Cap0805" part., f& k8 W6 o& I( Y# L& c6 e, Y" n
% z8 U/ B& g+ G0 M9 |% l
     Netload completed successfully with 0 warning(s).
; K) w) Z$ l6 x5 d+ t/ O     8 x! q* k  A( K
     Back Annotating...4 n& ?- j+ ^& s# W" a

( v9 i2 t; G8 }  Updating Logic Database...
; d, d+ f3 h- Q; q" T
: R+ K/ Q7 X3 x# V: m8 X( K     Version:  99.00.05
% ~, w, J" }+ Z  d3 a6 c# X. ~/ Z9 P  {
     No changes made to Existing Schematic Packaging.0 z7 e. Z7 x/ X  w- Z# J

1 g6 K2 o4 s* ^+ @# ]
4 w0 c% J5 W3 p; q/ O3 o7 n     There is no symbol data to be back annotated to the schematic source.

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4#
 楼主| 发表于 2011-5-5 22:24 | 只看该作者
  The Logic DataBase has been updated and the Common DataBase has
! ?% p8 ?. A. ?4 [/ y3 r4 o' u      automatically been brought into sync with the Logic DataBase.
4 s* Z% T9 \% C2 t1 ^8 Y      Please proceed with your design.6 A0 U" A. l4 j; }3 S

2 c" g7 y; n! U" p* s     Finished updating the Logic Database.* k2 k6 l# u) g% t9 b, P/ L; @6 v

" m' g- h; q. c5 v- I9 ^     Creating a formatted Schematic Netlist (LogFiles\AfterBakAnnoNetlist.txt)...$ W, r$ C' |6 n4 d' b5 a: e
     A formatted Schematic Netlist has been created.
8 [; _( m+ f' i4 O& M; j& m4 I% y6 H1 n, r5 J" N! _  U0 O4 Q3 ]5 w
     Creating a new netlist text file (LogFiles\KeyinNetList.txt)
* Y; X% I) p, ^      from the Logic Database (Work\Layout_Temp\LogicDB.lgc)...
* P8 ~/ Q0 E" B4 R  A new netlist text file has been generated.
+ H4 L& u1 h+ _9 n/ p8 i$ A2 `7 B# h* b8 u

' F; W+ R- j+ L2 e4 a
( K) S& s, \$ {9 q) P1 k  _                 Beginning Netload on the Layout Design.  ]5 w/ [; Y* \2 a, D$ F
           ---------------------------------------------------
) K4 I8 b+ _2 _& `5 e7 O& P$ }. z5 g) O  {, F& N  p
Forward-Annotation on the Layout Design has been successfully completed.
# h# _1 I$ x  Y' r$ n) ^/ H" u6 U: [) v0 Z- }* t$ @: e- o3 R+ H* S
There were 0 reassignments of nets.
, d4 `( m4 m$ h/ J) qThere were 0 traces broken back." \1 @3 [4 M6 A, c0 M) }
There were 0 nets removed from the Layout Design.

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5#
 楼主| 发表于 2011-5-5 22:28 | 只看该作者
这是一个forward 的log, 是什么原因不能Foreard 呢？

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6#
发表于 2011-5-6 17:42 | 只看该作者
  WARNING:  Cell  could not be found in the CellDB for
5 x" h5 W) [# V: _/ L8 Z      Part Number K4S281632K.8 H2 I' C/ k- e
6 ~; Q) i7 @9 ^: i0 S, c* c; E1 U2 r- \$ @/ u$ R
     WARNING:  Cell  could not be found in the CellDB for6 ^+ {. Z. ~+ T
) f# t6 ~- n, ]! J# w, W      Part Number IS61LV25616AL.
' v7 j9 _* ?& v. z/ c2 M2 G这2个元件是不是在原理图里面更改了part number。导致LIB中不能调入？

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